ATSAM3S1BA-AU Atmel, ATSAM3S1BA-AU Datasheet - Page 165
![IC MCU 32BIT 64KB FLASH 64LQFP](/photos/12/13/121332/313-64-tqfp_sml.jpg)
ATSAM3S1BA-AU
Manufacturer Part Number
ATSAM3S1BA-AU
Description
IC MCU 32BIT 64KB FLASH 64LQFP
Manufacturer
Atmel
Series
SAM3Sr
Specifications of ATSAM3S1BA-AU
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
47
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 1.95 V
Data Converters
A/D 10x10/12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Controller Family/series
ATSAM3S
No. Of I/o's
47
Ram Memory Size
16KB
Cpu Speed
64MHz
No. Of Timers
6
Rohs Compliant
Yes
Processor Series
ATSAM3x
Core
ARM Cortex M3
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3S-EK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- Current page: 165 of 1118
- Download datasheet (24Mb)
10.21.2
• DISFOLD
When set to 1, disables IT folding. see
• DISDEFWBUF
When set to 1, disables write buffer use during default memory map accesses. This causes all bus faults to be precise bus
faults but decreases performance because any store to memory must complete before the processor can execute the next
instruction.
This bit only affects write buffers implemented in the Cortex-M3 processor.
• DISMCYCINT
When set to 1, disables interruption of load multiple and store multiple instructions. This increases the interrupt latency of
the processor because any LDM or STM must complete before the processor can stack the current state and enter the
interrupt handler.
10.21.2.1
6500C–ATARM–8-Feb-11
31
23
15
7
Auxiliary Control Register
About IT folding
30
22
14
6
The ACTLR provides disable bits for the following processor functions:
See the register summary in
ments are:
In some situations, the processor can start executing the first instruction in an IT block while it is
still executing the IT instruction. This behavior is called IT folding, and improves performance,
However, IT folding can cause jitter in looping. If a task must avoid jitter, set the DISFOLD bit to
1 before executing the task, to disable IT folding.
• IT folding
• write buffer use for accesses to the default memory map
• interruption of multi-cycle instructions.
Reserved
29
21
13
5
“About IT folding” on page 165
28
20
12
4
Table 10-30 on page 164
Reserved
Reserved
Reserved
27
19
11
3
for more information.
DISFOLD
for the ACTLR attributes. The bit assign-
26
18
10
2
SAM3S Preliminary
DISDEFWBUF
25
17
9
1
DISMCYCINT
24
16
8
0
165
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