ATSAM3S1BA-AU Atmel, ATSAM3S1BA-AU Datasheet - Page 362

IC MCU 32BIT 64KB FLASH 64LQFP

ATSAM3S1BA-AU

Manufacturer Part Number
ATSAM3S1BA-AU
Description
IC MCU 32BIT 64KB FLASH 64LQFP
Manufacturer
Atmel
Series
SAM3Sr
Datasheets

Specifications of ATSAM3S1BA-AU

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
47
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 1.95 V
Data Converters
A/D 10x10/12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Controller Family/series
ATSAM3S
No. Of I/o's
47
Ram Memory Size
16KB
Cpu Speed
64MHz
No. Of Timers
6
Rohs Compliant
Yes
Processor Series
ATSAM3x
Core
ARM Cortex M3
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3S-EK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATSAM3S1BA-AU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATSAM3S1BA-AUR
Manufacturer:
Atmel
Quantity:
10 000
23.3
Table 23-1.
23.4
23.4.1
23.4.2
362
Name
NCS[3:0]
NRD
NWE
A[23:0]
D[7:0]
NWAIT
NANDCS
NANDOE
NANDWE
I/O Lines Description
Product Dependencies
SAM3S Preliminary
I/O Lines
Power Management
I/O Line Description
Description
Static Memory Controller Chip Select Lines
Read Signal
Write Enable Signal
Address Bus
Data Bus
External Wait Signal
NAND Flash Chip Select Line
NAND Flash Output Enable
NAND Flash Write Enable
The pins used for interfacing the Static Memory Controller are multiplexed with the PIO lines.
The programmer must first program the PIO controller to assign the Static Memory Controller
pins to their peripheral function. If I/O Lines of the SMC are not used by the application, they can
be used for other purposes by the PIO Controller.
The SMC is clocked through the Power Management Controller (PMC), thus the programmer
must first configure the PMC to enable the SMC clock.
Output
Output
Output
Output
Output
Output
Output
Type
Input
I/O
6500C–ATARM–8-Feb-11
Active Level
Low
Low
Low
Low
Low
Low
Low

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