ATSAM3S1BA-AU Atmel, ATSAM3S1BA-AU Datasheet - Page 1007

• Manufacturer Part Number: ATSAM3S1BA-AU
• Description: IC MCU 32BIT 64KB FLASH 64LQFP
• Manufacturer: Atmel
• Series: SAM3Sr

Specifications of ATSAM3S1BA-AU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 47
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 1.95 V
• Data Converters: A/D 10x10/12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Controller Family/series: ATSAM3S
• No. Of I/o's: 47
• Ram Memory Size: 16KB
• Cpu Speed: 64MHz
• No. Of Timers: 6
• Rohs Compliant: Yes
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3S-EK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

39.7.14
Name:
Address:
Access:
This register can only be written if the WPEN bit is cleared in
• CMPMODE: Comparison Mode
• CMPSEL: Comparison Selected Channel
If CMPALL = 0: CMPSEL indicates which channel has to be compared.
If CMPALL = 1: No effect.
• CMPALL: Compare All Channels
0 = Only channel indicated in CMPSEL field is compared.
1 = All channels are compared.
• TAG: TAG of ADC_LDCR register
0 = set CHNB to zero in ADC_LDCR.
1 = append the channel number to the conversion result in ADC_LDCR register.
6500C–ATARM–8-Feb-11
6500C–ATARM–8-Feb-11
Value
31
23
15
–
–
–
7
0
1
2
3
ADC Extended Mode Register
Name
HIGH
LOW
OUT
30
22
14
IN
ADC_EMR
0x40038040
Read-write
–
–
–
6
CMPSEL
Description
Generates an event when the converted data is lower than the low threshold of the window.
Generates an event when the converted data is higher than the high threshold of the window.
Generates an event when the converted data is in the comparison window.
Generates an event when the converted data is out of the comparison window.
29
21
13
–
–
–
5
28
20
12
–
–
–
4
“ADC Write Protect Mode Register” on page
27
19
11
–
–
–
3
–
26
18
10
–
–
–
2
–
SAM3S Preliminary
SAM3S Preliminary
CMPALL
25
17
–
–
9
1
CMPMODE
1013.
TAG
24
16
–
8
–
0
1007
1007