ATSAM3S1BA-AU Atmel, ATSAM3S1BA-AU Datasheet - Page 803

• Manufacturer Part Number: ATSAM3S1BA-AU
• Description: IC MCU 32BIT 64KB FLASH 64LQFP
• Manufacturer: Atmel
• Series: SAM3Sr

Specifications of ATSAM3S1BA-AU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 47
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 1.95 V
• Data Converters: A/D 10x10/12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Controller Family/series: ATSAM3S
• No. Of I/o's: 47
• Ram Memory Size: 16KB
• Cpu Speed: 64MHz
• No. Of Timers: 6
• Rohs Compliant: Yes
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3S-EK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Figure 35-7. Command/Response Functional Flow Diagram
Note:
6500C–ATARM–8-Feb-11
1. If the command is SEND_OP_COND, the CRC error flag is always present (refer to R3 response in the High Speed MultiMe-
dia Card specification).
The following flowchart shows how to send a command to the card and read the response if
needed. In this example, the status register bits are polled but setting the appropriate bits in the
interrupt enable register (HSMCI_IER) allows using an interrupt method.
Check error bits in the
Wait for command
status register
ready status flag
(1)
HSMCI_ARGR = Argument
Set the command argument
HSMCI_CMDR = Command
Read response if required
Does the command involve
Status error flags?
Set the command
Read HSMCI_SR
Read HSMCI_SR
a busy indication?
RETURN OK
NOTBUSY
CMDRDY
1
1
(1)
RETURN ERROR
Yes
No
0
0
RETURN OK
SAM3S Preliminary
(1)
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