ATSAM3S1BA-AU Atmel, ATSAM3S1BA-AU Datasheet - Page 118
ATSAM3S1BA-AU
Manufacturer Part Number
ATSAM3S1BA-AU
Description
IC MCU 32BIT 64KB FLASH 64LQFP
Manufacturer
Atmel
Series
SAM3Sr
Specifications of ATSAM3S1BA-AU
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
47
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 1.95 V
Data Converters
A/D 10x10/12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Controller Family/series
ATSAM3S
No. Of I/o's
47
Ram Memory Size
16KB
Cpu Speed
64MHz
No. Of Timers
6
Rohs Compliant
Yes
Processor Series
ATSAM3x
Core
ARM Cortex M3
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3S-EK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- Current page: 118 of 1118
- Download datasheet (24Mb)
10.13.9
10.13.9.1
10.13.9.2
10.13.9.3
10.13.9.4
10.13.9.5
118
TST
TEQEQ
SAM3S Preliminary
TST and TEQ
Syntax
Operation
Restrictions
Condition flags
Examples
R0, #0x3F8
R10, R9
Test bits and Test Equivalence.
where:
cond
Rn
Operand2
details of the options.
These instructions test the value in a register against Operand2. They update the condition flags
based on the result, but do not write the result to a register.
The TST instruction performs a bitwise AND operation on the value in Rn and the value of
Operand2. This is the same as the ANDS instruction, except that it discards the result.
To test whether a bit of Rn is 0 or 1, use the TST instruction with an Operand2 constant that has
that bit set to 1 and all other bits cleared to 0.
The TEQ instruction performs a bitwise Exclusive OR operation on the value in Rn and the value
of Operand2. This is the same as the EORS instruction, except that it discards the result.
Use the TEQ instruction to test if two values are equal without affecting the V or C flags.
TEQ is also useful for testing the sign of a value. After the comparison, the N flag is the logical
Exclusive OR of the sign bits of the two operands.
Do not use SP and do not use PC
These instructions:
• update the N and Z flags according to the result
• can update the C flag during the calculation of Operand2, see
• do not affect the V flag.
page 80
TST{cond} Rn, Operand2
TEQ{cond} Rn, Operand2
; Perform bitwise AND of R0 value to 0x3F8,
; APSR is updated but result is discarded
; Conditionally test if value in R10 is equal to
; value in R9, APSR is updated but result is discarded
is an optional condition code, see
is the register holding the first operand.
is a flexible second operand. See
.
“Conditional execution” on page
“Flexible second operand” on page 80
“Flexible second operand” on
6500C–ATARM–8-Feb-11
84.
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