ATSAM3S1BA-AU Atmel, ATSAM3S1BA-AU Datasheet - Page 300

• Manufacturer Part Number: ATSAM3S1BA-AU
• Description: IC MCU 32BIT 64KB FLASH 64LQFP
• Manufacturer: Atmel
• Series: SAM3Sr

Specifications of ATSAM3S1BA-AU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 47
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 1.95 V
• Data Converters: A/D 10x10/12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Controller Family/series: ATSAM3S
• No. Of I/o's: 47
• Ram Memory Size: 16KB
• Cpu Speed: 64MHz
• No. Of Timers: 6
• Rohs Compliant: Yes
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3S-EK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

18.3.3.6
300
SAM3S Preliminary
Calibration Bit
One error can be detected in the EEFC_FSR register after a programming sequence:
It is possible to clear GPNVM bits previously set. The clear GPNVM bit sequence is:
One error can be detected in the EEFC_FSR register after a programming sequence:
The status of GPNVM bits can be returned by the Enhanced Embedded Flash Controller
(EEFC). The sequence is:
For example, if the third bit of the first word read in the EEFC_FRR is set, then the third GPNVM
bit is active.
One error can be detected in the EEFC_FSR register after a programming sequence:
Note:
Calibration bits do not interfere with the embedded Flash memory plane.
It is impossible to modify the calibration bits.
The status of calibration bits can be returned by the Enhanced Embedded Flash Controller
(EEFC). The sequence is:
• When the GPVNM bit is set, the bit FRDY in the Flash Programming Status Register
• If the GPNVM bit number is greater than the total number of GPNVM bits, then the command
• A Command Error: a bad keyword has been written in the EEFC_FCR register.
• Start the Clear GPNVM Bit command (CGPB) by writing the Flash Command Register with
• When the clear completes, the FRDY bit in the Flash Programming Status Register
• If the GPNVM bit number is greater than the total number of GPNVM bits, then the command
• A Command Error: a bad keyword has been written in the EEFC_FCR register.
• Start the Get GPNVM bit command by writing the Flash Command Register with GGPB. The
• GPNVM bits can be read by the software application in the EEFC_FRR register. The first
• a Command Error: a bad keyword has been written in the EEFC_FCR register.
• Issue the Get CALIB Bit command by writing the Flash Command Register with GCALB (see
• Calibration bits can be read by the software application in the EEFC_FRR register. The first
(EEFC_FSR) rises. If an interrupt was enabled by setting the FRDY bit in EEFC_FMR, the
interrupt line of the NVIC is activated.
has no effect. The result of the SGPB command can be checked by running a GGPB (Get
GPNVM Bit) command.
CGPB and the number of the GPNVM bit to be cleared.
(EEFC_FSR) rises. If an interrupt has been enabled by setting the FRDY bit in EEFC_FMR,
the interrupt line of the NVIC is activated.
has no effect.
FARG field is meaningless.
word read corresponds to the 32 first GPNVM bits, following reads provide the next 32
GPNVM bits as long as it is meaningful. Extra reads to the EEFC_FRR register return 0.
Table
word read corresponds to the 32 first calibration bits, following reads provide the next 32
calibration bits as long as it is meaningful. Extra reads to the EEFC_FRR register return 0.
Access to the Flash in read is permitted when a set, clear or get GPNVM bit command is
performed.
18-2). The FARG field is meaningless.
6500C–ATARM–8-Feb-11