ATSAM3S1BA-AU Atmel, ATSAM3S1BA-AU Datasheet - Page 641

• Manufacturer Part Number: ATSAM3S1BA-AU
• Description: IC MCU 32BIT 64KB FLASH 64LQFP
• Manufacturer: Atmel
• Series: SAM3Sr

Specifications of ATSAM3S1BA-AU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 47
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 1.95 V
• Data Converters: A/D 10x10/12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Controller Family/series: ATSAM3S
• No. Of I/o's: 47
• Ram Memory Size: 16KB
• Cpu Speed: 64MHz
• No. Of Timers: 6
• Rohs Compliant: Yes
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3S-EK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

31.10.6
Figure 31-32. Read Write Flowchart in Slave Mode
6500C–ATARM–8-Feb-11
Read Write Flowcharts
No
No
SADR + MSDIS + SVEN
Set the SLAVE mode:
Read Status Register
EOSACC = 1 ?
TXCOMP = 1 ?
SVACC = 1 ?
No
END
The flowchart shown in
in Slave mode. A polling or interrupt method can be used to check the status bits. The interrupt
method requires that the interrupt enable register (TWI_IER) be configured first.
GACC = 1 ?
Figure 31-32 on page 641
No
programming sequence
Read TWI_RHR
SVREAD = 0 ?
RXRDY= 0 ?
Decoding of the
Change SADR
Prog seq
OK ?
No
gives an example of read and write operations
No
SAM3S Preliminary
GENERAL CALL TREATMENT
No
Write in TWI_THR
TXRDY= 1 ?
No
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