ATSAM3S1BA-AU Atmel, ATSAM3S1BA-AU Datasheet - Page 814

• Manufacturer Part Number: ATSAM3S1BA-AU
• Description: IC MCU 32BIT 64KB FLASH 64LQFP
• Manufacturer: Atmel
• Series: SAM3Sr

Specifications of ATSAM3S1BA-AU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 47
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 1.95 V
• Data Converters: A/D 10x10/12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Controller Family/series: ATSAM3S
• No. Of I/o's: 47
• Ram Memory Size: 16KB
• Cpu Speed: 64MHz
• No. Of Timers: 6
• Rohs Compliant: Yes
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3S-EK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

35.14 High Speed MultiMedia Card Interface (HSMCI) User Interface
Table 35-8.
Note:
814
0x100-0x1FC
0xEC - 0xFC
0x38 - 0x3C
0x58-0xE0
Offset
0x5FC
0x200
0x0C
0x1C
0x2C
0x4C
0x00
0x04
0x08
0x10
0x14
0x18
0x20
0x24
0x28
0x30
0x34
0x40
0x44
0x48
0x50
0x54
0xE4
0xE8
1. The response register can be read by N accesses at the same HSMCI_RSPR or at consecutive addresses (0x20 to 0x2C).
...
SAM3S Preliminary
N depends on the size of the response.
Register Mapping
Register
Control Register
Mode Register
Data Timeout Register
SD/SDIO Card Register
Argument Register
Command Register
Block Register
Completion Signal Timeout Register
Response Register
Response Register
Response Register
Response Register
Receive Data Register
Transmit Data Register
Reserved
Status Register
Interrupt Enable Register
Interrupt Disable Register
Interrupt Mask Register
Reserved
Configuration Register
Reserved
Write Protection Mode Register
Write Protection Status Register
Reserved
Reserved
FIFO Memory Aperture0
FIFO Memory Aperture255
(1)
(1)
(1)
(1)
...
HSMCI_FIFO255
HSMCI_CSTOR
HSMCI_WPMR
HSMCI_CMDR
HSMCI_WPSR
HSMCI_ARGR
HSMCI_DTOR
HSMCI_SDCR
HSMCI_RSPR
HSMCI_RSPR
HSMCI_RSPR
HSMCI_RSPR
HSMCI_FIFO0
HSMCI_BLKR
HSMCI_RDR
HSMCI_TDR
HSMCI_CFG
HSMCI_IMR
HSMCI_IER
HSMCI_IDR
HSMCI_MR
HSMCI_CR
HSMCI_SR
Name
...
–
–
–
–
–
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-only
Access
Write
Write
Read
Read
Read
Read
Read
Write
Read
Write
Write
Read
...
–
–
–
–
–
6500C–ATARM–8-Feb-11
0xC0E5
Reset
0x00
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
...
–
–
–
–
–
–
–
–
–
–
–
–