ATSAM3S1BA-AU Atmel, ATSAM3S1BA-AU Datasheet - Page 206

• Manufacturer Part Number: ATSAM3S1BA-AU
• Description: IC MCU 32BIT 64KB FLASH 64LQFP
• Manufacturer: Atmel
• Series: SAM3Sr

Specifications of ATSAM3S1BA-AU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 47
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 1.95 V
• Data Converters: A/D 10x10/12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Controller Family/series: ATSAM3S
• No. Of I/o's: 47
• Ram Memory Size: 16KB
• Cpu Speed: 64MHz
• No. Of Timers: 6
• Rohs Compliant: Yes
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3S-EK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

10.23.7
10.23.8
10.23.8.1
206
SAM3S Preliminary
MPU mismatch
Updating an MPU region
Updating an MPU region using separate words
Table 10-39. AP encoding (Continued)
When an access violates the MPU permissions, the processor generates a memory manage-
ment fault, see
fault. See
To update the attributes for an MPU region, update the RNR, RBAR and RASR registers. You
can program each register separately, or use a multiple-word write to program all of these regis-
ters. You can use the RBAR and RASR aliases to program up to four regions simultaneously
using an STM instruction.
Simple code to configure one region:
Disable a region before writing new region settings to the MPU if you have previously enabled
the region being changed. For example:
Software must use memory barrier instructions:
AP[2:0]
101
110
111
; R1 = region number
; R2 = size/enable
; R3 = attributes
; R4 = address
LDR R0,=MPU_RNR
STR R1, [R0, #0x0]
STR R4, [R0, #0x4]
STRH R2, [R0, #0x8]
STRH R3, [R0, #0xA]
; R1 = region number
; R2 = size/enable
; R3 = attributes
; R4 = address
LDR R0,=MPU_RNR
STR R1, [R0, #0x0]
BIC R2, R2, #1
STRH R2, [R0, #0x8]
STR R4, [R0, #0x4]
STRH R3, [R0, #0xA]
ORR R2, #1
STRH R2, [R0, #0x8]
“Memory Management Fault Status Register” on page 182
Privileged
permissions
RO
RO
RO
“Exceptions and interrupts” on page
Unprivileged
permissions
No access
RO
RO
; 0xE000ED98, MPU region number register
; Region Number
; Region Base Address
; Region Size and Enable
; Region Attribute
; 0xE000ED98, MPU region number register
; Region Number
; Disable
; Region Size and Enable
; Region Base Address
; Region Attribute
; Enable
; Region Size and Enable
Description
Reads by privileged software only
Read only, by privileged or unprivileged software
Read only, by privileged or unprivileged software
52. The MMFSR indicates the cause of the
for more information.
6500C–ATARM–8-Feb-11