ATSAM3S1BA-AU Atmel, ATSAM3S1BA-AU Datasheet - Page 1101

• Manufacturer Part Number: ATSAM3S1BA-AU
• Description: IC MCU 32BIT 64KB FLASH 64LQFP
• Manufacturer: Atmel
• Series: SAM3Sr

Specifications of ATSAM3S1BA-AU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 47
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 1.95 V
• Data Converters: A/D 10x10/12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Controller Family/series: ATSAM3S
• No. Of I/o's: 47
• Ram Memory Size: 16KB
• Cpu Speed: 64MHz
• No. Of Timers: 6
• Rohs Compliant: Yes
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3S-EK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Revision History
6500C–ATARM–8-Feb-11
Doc. Rev.
6500C
Comments
Overview:
‘able’ removed from ‘This enables the SAM3S able to sustain...’ sentence, and ‘a ADC’ replaced by ‘an ADC’ in
Section 1.
Section 5.5.1 “Backup
Leftover sentence in
Last sentence from
‘three GPNVM bits’ replaced by ‘two GPNVM bits’ in first sentence of
TPGMD8 to 15 added to
SAM3S4/2/1C
ARM Cortex M3 Processor:
Cross-referencing and formatting problems fixed in first 3 pages of
Debug and Test Features:
Text edited in
GPBR:
IP Name and IP Acronym variables fixed.
TDescription title in
PMC:
CSS and PRES bitfield value tables updated in
26.16.13 “PMC Programmable Clock
MOSCRCF bitfield value tables updated in
Section 26.11 “Fast Startup”
descriptions reversed.
WDT:
Register addresses updated in
Section 15.5.1
Electrical Characteristics:
Section 41.11.3.1 “Maximum SPI
Table 41-51, “USART SPI Timings”
Ordering Information:
Heading text added to
Errata:
‘(AD)’ acronym replaced by ‘(ADC)’ in
Section 44.2.2.3 “ADC: Trigger Launch Only One Conversion”
Section 44.2.4.1 “SAM-BA Boot: Start-up Issue when Using No Clock on XIN”
Section 44.2 “Errata Revision A Parts”
Typo fixed on back page: ‘techincal’ --> ‘technical’
Section 11.5.7 “IEEE
Pinout”.
‘Register Name:’ replaced by ‘Register:’
In the tables that follow, the most recent version of the document appears first.
“rfo” indicates changes requested during document review and approval loop.
Section 7.2.3.10 “SAM-BA
Section 17.1
Section 4.1 “SAM3S4/2/1C Package and Pinout”
Mode”, sentence starting with ‘By configuring...’ updated.
Table
Section 4-1 “100-lead LQFP SAM3S4/2/1C Pinout”
updated. In
43-1.
Section 15.5.1
fixed.
Frequency”, Master Read Mode, ‘deleting’ replaced by ‘detecting’.
®
updated: SPIo Min value edited, and all ‘MCK’ replaced by ‘t
1149.1 JTAG Boundary
Register”.
Section 44.2.2
updated
Section 26.16.16 “PMC Status
Section 26.16.7 “PMC Clock Generator Main Oscillator
®
to
Section 26.16.11 “PMC Master Clock Register”
Boot”
Section
title.
removed.
15.5.3.
Scan”.
added.
Section 10.24
Section 7.2.3.11 “GPNVM
removed.
Register”, MOCSELS bit value
and
added.
Section 4-2 “100-ball LFBGA
“Glossary”.
SAM3S Preliminary
and
CPMCK
Bits”.
Register”.
Section
’.
Change
Request
Ref.
7524
7492
7394
7428
rfo
rfo
7488
7448
7360
7539
7407
rfo
7524
7530
7596
7536
1101