ATSAM3S1BA-AU Atmel, ATSAM3S1BA-AU Datasheet - Page 115

IC MCU 32BIT 64KB FLASH 64LQFP

ATSAM3S1BA-AU

Manufacturer Part Number
ATSAM3S1BA-AU
Description
IC MCU 32BIT 64KB FLASH 64LQFP
Manufacturer
Atmel
Series
SAM3Sr
Datasheets

Specifications of ATSAM3S1BA-AU

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
47
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 1.95 V
Data Converters
A/D 10x10/12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Controller Family/series
ATSAM3S
No. Of I/o's
47
Ram Memory Size
16KB
Cpu Speed
64MHz
No. Of Timers
6
Rohs Compliant
Yes
Processor Series
ATSAM3x
Core
ARM Cortex M3
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3S-EK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATSAM3S1BA-AU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATSAM3S1BA-AUR
Manufacturer:
Atmel
Quantity:
10 000
10.13.6.4
10.13.6.5
6500C–ATARM–8-Feb-11
MOVS
MOV
MOVS
MOV
MOV
MVNS
Condition flags
Example
R11, #0x000B
R1, #0xFA05
R10, R12
R3, #23
R8, SP
R2, #0xF
Though it is possible to use MOV as a branch instruction, ARM strongly recommends the use of
a BX or BLX instruction to branch for software portability to the ARM instruction set.
If S is specified, these instructions:
• bit[0] of the value written to the PC is ignored
• a branch occurs to the address created by forcing bit[0] of that value to 0.
• update the N and Z flags according to the result
• can update the C flag during the calculation of Operand2, see
• do not affect the V flag.
page 80
; Write value of 0x000B to R11, flags get updated
; Write value of 0xFA05 to R1, flags are not updated
; Write value in R12 to R10, flags get updated
; Write value of 23 to R3
; Write value of stack pointer to R8
; Write value of 0xFFFFFFF0 (bitwise inverse of 0xF)
; to the R2 and update flags
SAM3S Preliminary
“Flexible second operand” on
115

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