ATSAM3S1BA-AU Atmel, ATSAM3S1BA-AU Datasheet - Page 133

• Manufacturer Part Number: ATSAM3S1BA-AU
• Description: IC MCU 32BIT 64KB FLASH 64LQFP
• Manufacturer: Atmel
• Series: SAM3Sr

Specifications of ATSAM3S1BA-AU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 47
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 1.95 V
• Data Converters: A/D 10x10/12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Controller Family/series: ATSAM3S
• No. Of I/o's: 47
• Ram Memory Size: 16KB
• Cpu Speed: 64MHz
• No. Of Timers: 6
• Rohs Compliant: Yes
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3S-EK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

10.17.3
10.17.3.1
10.17.3.2
10.17.3.3
6500C–ATARM–8-Feb-11
IT
Syntax
Operation
Restrictions
If-Then condition instruction.
where:
x
y
z
cond
The condition switch for the second, third and fourth instruction in the IT block can be either:
It is possible to use AL (the always condition) for cond in an IT instruction. If this is done, all of
the instructions in the IT block must be unconditional, and each of x, y, and z must be T or omit-
ted but not E.
The IT instruction makes up to four following instructions conditional. The conditions can be all
the same, or some of them can be the logical inverse of the others. The conditional instructions
following the IT instruction form the IT block.
The instructions in the IT block, including any branches, must specify the condition in the {cond}
part of their syntax.
Your assembler might be able to generate the required IT instructions for conditional instructions
automatically, so that you do not need to write them yourself. See your assembler documenta-
tion for details.
A BKPT instruction in an IT block is always executed, even if its condition fails.
Exceptions can be taken between an IT instruction and the corresponding IT block, or within an
IT block. Such an exception results in entry to the appropriate exception handler, with suitable
return information in LR and stacked PSR.
Instructions designed for use for exception returns can be used as normal to return from the
exception, and execution of the IT block resumes correctly. This is the only way that a PC-modi-
fying instruction is permitted to branch to an instruction in an IT block.
The following instructions are not permitted in an IT block:
Other restrictions when using an IT block are:
• IT
• CBZ and CBNZ
• CPSID and CPSIE.
IT{x{y{z}}} cond
T
E
specifies the condition switch for the second instruction in the IT block.
specifies the condition switch for the third instruction in the IT block.
specifies the condition switch for the fourth instruction in the IT block.
specifies the condition for the first instruction in the IT block.
Then. Applies the condition cond to the instruction.
Else. Applies the inverse condition of cond to the instruction.
SAM3S Preliminary
133