ATSAM3S1BA-AU Atmel, ATSAM3S1BA-AU Datasheet - Page 86

• Manufacturer Part Number: ATSAM3S1BA-AU
• Description: IC MCU 32BIT 64KB FLASH 64LQFP
• Manufacturer: Atmel
• Series: SAM3Sr

Specifications of ATSAM3S1BA-AU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 47
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 1.95 V
• Data Converters: A/D 10x10/12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Controller Family/series: ATSAM3S
• No. Of I/o's: 47
• Ram Memory Size: 16KB
• Cpu Speed: 64MHz
• No. Of Timers: 6
• Rohs Compliant: Yes
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3S-EK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

10.11.7.3
The example below shows the use of a conditional instruction to find the absolute value of a number. R0 = ABS(R1).
10.11.7.4
The example below shows the use of conditional instructions to update the value of R4 if the signed values R0 is greater
than R1 and R2 is greater than R3.
10.11.8
10.11.8.1
To use an instruction width suffix, place it immediately after the instruction mnemonic and condition code, if any. The exam-
ple below shows instructions with the instruction width suffix.
86
MOVS
IT
RSBMI
CMP
ITT
CMPGT
MOVGT
BCS.W
ADDS.W R0, R0, R1 ; creates a 32-bit instruction even though the same
SAM3S Preliminary
Instruction width selection
Absolute value
Compare and update value
Instruction width selection
label
R0, R1
MI
R0, R1, #0
R0, R1
GT
R2, R3
R4, R5
Table 10-16. Condition code suffixes (Continued)
There are many instructions that can generate either a 16-bit encoding or a 32-bit encoding
depending on the operands and destination register specified. For some of these instructions,
you can force a specific instruction size by using an instruction width suffix. The .W suffix forces
a 32-bit instruction encoding. The .N suffix forces a 16-bit instruction encoding.
If you specify an instruction width suffix and the assembler cannot generate an instruction
encoding of the requested width, it generates an error.
In some cases it might be necessary to specify the .W suffix, for example if the operand is the
label of an instruction or literal data, as in the case of branch instructions. This is because the
assembler might not automatically generate the right size encoding.
Suffix
VC
HI
LS
GE
LT
GT
LE
AL
; creates a 32-bit instruction even for a short branch
; operation can be done by a 16-bit instruction
; Compare R0 and R1, setting flags
; IT instruction for the two GT conditions
; If 'greater than', compare R2 and R3, setting flags
; If still 'greater than', do R4 = R5
Flags
V = 0
C = 1 and Z = 0
C = 0 or Z = 1
N = V
N ! = V
Z = 0 and N = V
Z = 1 and N ! = V
Can have any
value
; R0 = R1, setting flags
; IT instruction for the negative condition
; If negative, R0 = -R1
Meaning
No overflow
Higher, unsigned >
Lower or same, unsigned ≤
Greater than or equal, signed ≥
Less than, signed <
Greater than, signed >
Less than or equal, signed ≤
Always. This is the default when no suffix is
specified.
6500C–ATARM–8-Feb-11