ATSAM3S1BA-AU Atmel, ATSAM3S1BA-AU Datasheet - Page 314

IC MCU 32BIT 64KB FLASH 64LQFP

ATSAM3S1BA-AU

Manufacturer Part Number
ATSAM3S1BA-AU
Description
IC MCU 32BIT 64KB FLASH 64LQFP
Manufacturer
Atmel
Series
SAM3Sr
Datasheets

Specifications of ATSAM3S1BA-AU

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
47
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 1.95 V
Data Converters
A/D 10x10/12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Controller Family/series
ATSAM3S
No. Of I/o's
47
Ram Memory Size
16KB
Cpu Speed
64MHz
No. Of Timers
6
Rohs Compliant
Yes
Processor Series
ATSAM3x
Core
ARM Cortex M3
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3S-EK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATSAM3S1BA-AU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATSAM3S1BA-AUR
Manufacturer:
Atmel
Quantity:
10 000
19.2.5.2
314
SAM3S Preliminary
Flash Write Command
Table 19-7.
This command is used to write the Flash contents.
The Flash memory plane is organized into several pages. Data to be written are stored in a load
buffer that corresponds to a Flash memory page. The load buffer is automatically flushed to the
Flash:
The Write Page command (WP) is optimized for consecutive writes. Write handshaking can be
chained; an internal address buffer is automatically increased.
Table 19-8.
Table 19-9.
Step
n+1
n+2
n+3
n+4
n+5
...
Step
1
2
3
4
5
...
n
n+1
n+2
n+3
...
Step
1
2
3
4
• before access to any page other than the current one
• when a new command is validated (MODE = CMDE)
Handshake Sequence
Write handshaking
Write handshaking
Write handshaking
Read handshaking
Read handshaking
...
Handshake Sequence
Write handshaking
Write handshaking
Write handshaking
Write handshaking
Write handshaking
...
Write handshaking
Write handshaking
Write handshaking
Write handshaking
...
Handshake Sequence
Write handshaking
Write handshaking
Write handshaking
Write handshaking
Read Command (Continued)
Write Command
Write Command
MODE[3:0]
CMDE
ADDR0
ADDR1
DATA
DATA
...
ADDR0
ADDR1
DATA
DATA
...
MODE[3:0]
ADDR0
MODE[3:0]
ADDR1
ADDR2
ADDR3
DATA
DATA
...
CMDE
ADDR1
ADDR2
DATA[15:0]
WP or WPL or EWP or EWPL
Memory Address LSB
Memory Address
*Memory Address++
*Memory Address++
...
Memory Address LSB
Memory Address
*Memory Address++
*Memory Address++
...
DATA[7:0]
WP or WPL or EWP or EWPL
Memory Address LSB
Memory Address
Memory Address
DATA[7:0]
Memory Address
Memory Address
Memory Address
*Memory Address++
*Memory Address++
...
6500C–ATARM–8-Feb-11

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