EP2AGX45DF29I5N Altera, EP2AGX45DF29I5N Datasheet - Page 81

• Manufacturer Part Number: EP2AGX45DF29I5N
• Description: IC ARRIA II GX FPGA 45K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX45DF29I5N

• Number Of Logic Elements/cells: 42959
• Number Of Labs/clbs: 1805
• Total Ram Bits: 3435
• Number Of I /o: 364
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 45125
• # I/os (max): 364
• Frequency (max): 500MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 45125
• Ram Bits: 3565158.4
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

Chapter 4: DSP Blocks in Arria II Devices
DSP Block Resource Descriptions
Figure 4–6. Input Register of Half-DSP Block
Note to
(1) The scanina signal originates from the previous DSP block, while the scanouta signal goes to the next DSP block.
December 2010 Altera Corporation
Figure
Input Registers
4–6:
datab_2[17..0]
dataa_3[17..0]
datab_3[17..0]
dataa_1[17..0]
datab_1[17..0]
dataa_2[17..0]
dataa_0[17..0]
datab_0[17..0]
loopback
Figure 4–6
scanina[17..0]
shows the input register of a half-DSP block.
clock[3..0]
ena[3..0]
aclr[3..0]
Register
(Note 1)
Delay
scanouta
Arria II Device Handbook Volume 1: Device Interfaces and Integration
signa
signb
+/-
+/-
4–9