EP2AGX45DF29I5N Altera, EP2AGX45DF29I5N Datasheet - Page 335

• Manufacturer Part Number: EP2AGX45DF29I5N
• Description: IC ARRIA II GX FPGA 45K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX45DF29I5N

• Number Of Logic Elements/cells: 42959
• Number Of Labs/clbs: 1805
• Total Ram Bits: 3435
• Number Of I /o: 364
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 45125
• # I/os (max): 364
• Frequency (max): 500MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 45125
• Ram Bits: 3565158.4
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

Chapter 9: Configuration, Design Security, and Remote System Upgrades in Arria II Devices
Dedicated Remote System Upgrade Circuitry
Dedicated Remote System Upgrade Circuitry
Figure 9–25. Remote System Upgrade Circuit Data Path
Note to
(1) The RU_DOUT, RU_SHIFTnLD, RU_CAPTnUPDT, RU_CLK, RU_DIN, RU_nCONFIG, and RU_nRSTIMER signals are internally controlled by the
December 2010 Altera Corporation
ALTREMOTE_UPDATE megafunction.
Figure
RU_DOUT
9–25:
dout
Status Register (SR)
This section describes the implementation of the Arria II remote system upgrade
dedicated circuitry.
The remote system upgrade circuitry is implemented in hard logic. This dedicated
circuitry interfaces with the user-defined factory and application configurations
implemented in the Arria II device logic array to provide the complete remote
configuration solution. The remote system upgrade circuitry contains the remote
system upgrade registers, a watchdog timer, and a state machine that controls those
components.
Figure 9–25
Bit [4..0]
[4..0]
RU_SHIFTnLD
capture
Shift Register
din
shows the datapath of the remote system upgrade block.
RU_CAPTnUPDT
dout
Control Register
Update Register
Logic Array
Bit [37..0]
[37..0]
[37..0]
Logic Array
clkout
Logic Array
(Note 1)
capture
capture
update
RU_CLK
clkin
Arria II Device Handbook Volume 1: Device Interfaces and Integration
din
update
RU_DIN RU_nCONFIG
Internal Oscillator
Machine
State
RSU
time-out
RU_nRSTIMER
Watchdog
Timer
User
9–55