EP2AGX45DF29I5N Altera, EP2AGX45DF29I5N Datasheet - Page 321

• Manufacturer Part Number: EP2AGX45DF29I5N
• Description: IC ARRIA II GX FPGA 45K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX45DF29I5N

• Number Of Logic Elements/cells: 42959
• Number Of Labs/clbs: 1805
• Total Ram Bits: 3435
• Number Of I /o: 364
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 45125
• # I/os (max): 364
• Frequency (max): 500MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 45125
• Ram Bits: 3565158.4
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

Chapter 9: Configuration, Design Security, and Remote System Upgrades in Arria II Devices
Device Configuration Pins
Table 9–16. Dedicated Configuration Pins on the Arria II Device (Part 2 of 4)
December 2010 Altera Corporation
nSTATUS
CONF_DONE
Pin Name
User Mode
N/A
N/A
Configuration
Scheme
All
All
Bidirectional
Bidirectional
open-drain
open-drain
Pin Type
The device drives nSTATUS low immediately after power-up
and releases it after the POR time.
During user mode and regular configuration, this pin is
pulled high by an external 10-kΩ resistor.
This pin, when driven low by the Arria II device, indicates
that the device has encountered an error during
configuration.
■
■
Driving nSTATUS low after configuration and initialization
does not affect the configured device. If you use a
configuration device, driving nSTATUS low causes the
configuration device to attempt to configure the device, but
because the device ignores transitions on nSTATUS in user
mode, the device does not reconfigure. To begin a
reconfiguration, nCONFIG must be pulled low.
If V
devices are not fully powered up, the following could occur:
■
■
Status output. The target device drives the CONF_DONE pin
low before and during configuration. After all configuration
data is received without error and the initialization cycle
starts, the target device releases CONF_DONE.
Status input. After all data is received and CONF_DONE goes
high, the target device initializes and enters user mode. The
CONF_DONE pin must have an external 10-kΩ pull-up
resistor for the device to initialize.
Driving CONF_DONE low after configuration and initialization
does not affect the configured device.
Status output—If an error occurs during configuration,
nSTATUS is pulled low by the target device.
Status input—If an external source drives the nSTATUS
pin low during configuration or initialization, the target
device enters an error state.
V
buffer to function properly and nSTATUS is driven low.
When V
is released after POR expires.
V
buffer to function properly. In this situation, nSTATUS
might appear logic high, triggering a configuration
attempt that fails because POR did not yet trip. When
V
did not yet trip. When POR trips after V
powered up, nSTATUS is released and pulled high. At that
point, reconfiguration is triggered and the device is
configured.
Arria II Device Handbook Volume 1: Device Interfaces and Integration
CCIO
CCIO
CCIO
CCPD
for Arria II GX devices or V
/V
/V
is powered up, nSTATUS is pulled low because POR
CCPGM
CCPGM
CCIO
/V
is not powered high enough for the nSTATUS
is powered high enough for the nSTATUS
CCPGM
is ramped up, POR trips and nSTATUS
Description
CCPGM
for Arria II GZ
CCIO
/V
CCPGM
is
9–41