EP2AGX45DF29I5N Altera, EP2AGX45DF29I5N Datasheet - Page 575

• Manufacturer Part Number: EP2AGX45DF29I5N
• Description: IC ARRIA II GX FPGA 45K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX45DF29I5N

• Number Of Logic Elements/cells: 42959
• Number Of Labs/clbs: 1805
• Total Ram Bits: 3435
• Number Of I /o: 364
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 45125
• # I/os (max): 364
• Frequency (max): 500MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 45125
• Ram Bits: 3565158.4
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

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AIIGX52004-3.0
User Reset and Power-Down Signals
Arria II Device Handbook Volume 2: Transceivers
December 2010
December 2010
AIIGX52004-3.0
1
Arria
channels and clock multiplier unit (CMU) phase-locked loops (PLLs) independently.
The ALTGX Transceiver MegaWizard
signals for each channel instantiated in the design. It also provides one power-down
signal for each transceiver block.
This chapter includes the following sections:
■
■
■
■
■
Figure 4–1
device.
Figure 4–1. Reset Control and Power-Down Block
Each transceiver channel in the Arria II device family has individual reset signals to
reset its physical coding sublayer (PCS) and physical medium attachment (PMA)
blocks. Each CMU PLL in the transceiver block has a dedicated reset signal. The
transceiver block also has a power-down signal that affects all the channels and CMU
PLLs in the transceiver block.
All reset and power-down signals are asynchronous.
“User Reset and Power-Down Signals” on page 4–1
“Transceiver Reset Sequences” on page 4–4
“Dynamic Reconfiguration Reset Sequences” on page 4–17
“Power Down” on page 4–19
“Simulation Requirements” on page 4–20
®
II GX and GZ devices offer multiple reset signals to control transceiver
shows the reset control and power-down block for an Arria II GX or GZ
gxb_powerdown
pll_powerdown
rx_analogreset
rx_digitalreset
tx_digitalreset
4. Reset Control and Power Down in
™
Plug-In Manager provides individual reset
Reset Controller
Arria II Devices
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