EP2AGX45DF29I5N Altera, EP2AGX45DF29I5N Datasheet - Page 547

• Manufacturer Part Number: EP2AGX45DF29I5N
• Description: IC ARRIA II GX FPGA 45K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX45DF29I5N

• Number Of Logic Elements/cells: 42959
• Number Of Labs/clbs: 1805
• Total Ram Bits: 3435
• Number Of I /o: 364
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 45125
• # I/os (max): 364
• Frequency (max): 500MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 45125
• Ram Bits: 3565158.4
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

Chapter 2: Transceiver Clocking in Arria II Devices
FPGA Fabric PLL-Transceiver PLL Cascading
December 2010 Altera Corporation
The dedicated PLL cascade networks are segmented by bidirectional tri-state buffers
located along the clock line. Segmentation of the dedicated PLL cascade network
allows two left PLLs to drive the cascade clock line simultaneously to provide the
input reference clock to the CMU PLLs and receiver CDRs in different transceiver
blocks.
The following sections describe the dedicated PLL cascade networks available in the
Arria II GX device family.
The FPGA fabric PLLs-transceiver PLLs cascading option is available in the following
Arria II GX devices with four channels:
■
■
Figure 2–31
in the EP2AGX45CU17 and EP2AGX65CU17 devices.
Figure 2–31. FPGA Fabric PLLs-Transceiver PLLs Cascading Option Allowed in the
EP2AGX45CU17 and EP2AGX65CU17 Devices
The FPGA fabric PLLs-transceiver PLLs cascading option is available in the following
Arria II GX devices with eight channels:
■
■
■
■
■
■
EP2AGX45CU17
EP2AGX65CU17
EP2AGX45DF25
EP2AGX45DF29
EP2AGX65DF25
EP2AGX45DF29
EP2AGX95DF25
EP2AGX125DF25
shows the FPGA fabric PLLs-transceiver PLLs cascading option allowed
Channel 3
Channel 2
Channel 1
Channel 0
Transceiver Block GXBL0
CMU 1
CMU 0
PLL
PLL
CDR
CDR
CDR
CDR
Cascade
Network
PLL
Arria II Device Handbook Volume 2: Transceivers
PLL_1
PLL_4
EP2AGX45CU17
EP2AGX65CU17
2–57