EP2AGX45DF29I5N Altera, EP2AGX45DF29I5N Datasheet - Page 319

• Manufacturer Part Number: EP2AGX45DF29I5N
• Description: IC ARRIA II GX FPGA 45K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX45DF29I5N

• Number Of Logic Elements/cells: 42959
• Number Of Labs/clbs: 1805
• Total Ram Bits: 3435
• Number Of I /o: 364
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 45125
• # I/os (max): 364
• Frequency (max): 500MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 45125
• Ram Bits: 3565158.4
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

Chapter 9: Configuration, Design Security, and Remote System Upgrades in Arria II Devices
Device Configuration Pins
Device Configuration Pins
Table 9–15. Configuration Pin Summary for Arria II Devices
December 2010 Altera Corporation
TDI
TMS
TCK
TRST
TDO
CRC_ERROR
DATA0
DATA[7..1]
INIT_DONE
CLKUSR
nSTATUS
nCE
CONF_DONE
nCONFIG
ASDO
nCSO
DCLK
nIO_PULLUP
nCEO
MSEL[2..0]
MSEL[3..0]
Notes to
(1) Arria II GX devices use V
(2) For Arria II GZ devices, these pins are powered up by V
(3) Although the nIO_PULLUP is powered up by V
(4) Arria II GZ devices use a MSEL[2..0] configuration scheme.
(5) Arria II GX devices use a MSEL[3..0] configuration scheme.
(6) Although MSEL[2..0], PORSEL, and nIO_PULLUP are powered by V
devices, or GND directly without using a pull-up or pull-down resistor.
without using a pull-up or pull-down resistor.
Table
Description
(4)
(5)
9–15:
Table 9–15
configuration-related pins on the Arria II devices.
Table 9–15
CCIO
while Arria II GZ devices use V
Input
Input
Input
Input
Output
Output
Input
Input
Output
Input
Bidirectional
Input
Bidirectional
Input
Output
Output
Input
Output
Input
Output
Input
Input
through
lists the Arria II configuration pins and their power supply.
Input/Output
CC
, Altera recommends connecting this pin to V
Table 9–18
CCPGM
CCPD
during configuration and V
.
list the connections and functionality of all the
Dedicated
CC
, Altera recommends connecting these pins to V
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
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Arria II Device Handbook Volume 1: Device Interfaces and Integration
V
V
V
Powered By
CCIO
V
V
V
CCPGM
CCPGM
CCPGM
V
V
V
V
V
V
CCPGM
CCPGM
CCPGM
V
V
V
V
V
CCPGM
CCPGM
CCPGM
CCPGM
CCPGM
CCPGM
if they are used as a regular I/O in user mode.
V
CCPGM
CCPD
CCPD
CCPD
CCPD
CCPD
V
Pull-up
Pull-up
CCIO
V
CC
/V
/V
/V
CCPD
/Pull-up
/Pull-up
/Pull-up
/V
/V
/V
/V
/V
/V
/V
/V
/V
/V
/V
CCIO
CCIO
CCIO
for Arria II GZ devices, V
(3)
(6)
CCIO
CCIO
CCIO
CCIO
CCIO
CCIO
CCIO
CCIO
CCIO
CCIO
CCIO
(1)
(2)
(2)
(2)
JTAG
JTAG
JTAG
JTAG
JTAG
Optional, all modes
All modes except JTAG
FPP
Optional, all modes
Optional
All modes
All modes
All modes
All modes
AS
AS
PS, FPP
AS
All modes
All modes
All modes
All modes
Configuration Mode
CCPGM
CCIO
or GND directly
for Arria II GX
9–39