EP2AGX45DF29I5N Altera, EP2AGX45DF29I5N Datasheet - Page 70

• Manufacturer Part Number: EP2AGX45DF29I5N
• Description: IC ARRIA II GX FPGA 45K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX45DF29I5N

• Number Of Logic Elements/cells: 42959
• Number Of Labs/clbs: 1805
• Total Ram Bits: 3435
• Number Of I /o: 364
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 45125
• # I/os (max): 364
• Frequency (max): 500MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 45125
• Ram Bits: 3565158.4
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

3–24
Figure 3–25. M9K and M144K Mixed Port Read During Write: Old Data Mode
Figure 3–26. M9K and M144K Mixed-Port Read-During-Write: Don’t Care Mode
Arria II Device Handbook Volume 1: Device Interfaces and Integration
q_b_(asynch)
q_b_(asynch)
address_a
address_b
address_a
address_b
clk_a&b
byteena
clk_a&b
byteena
data_a
data_a
wrena
wrena
rdenb
rdenb
Figure 3–25
behavior in old data mode.
Figure 3–26
behavior for don’t care mode in M9K and M144K blocks.
Mixed-port read-during-write is not supported when two different clocks are used in
a dual-port RAM. The output value is unknown during a dual-clock mixed-port
read-during-write operation.
shows a sample functional waveform of mixed-port read-during-write
shows a sample functional waveform of mixed-port read-during-write
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A0
A0
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XXXX (unknown data)
10
AABB
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DDDD
A1(old data)
Chapter 3: Memory Blocks in Arria II Devices
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A1
A1
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December 2010 Altera Corporation
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Design Considerations