EP2AGX45DF29I5N Altera, EP2AGX45DF29I5N Datasheet - Page 274

• Manufacturer Part Number: EP2AGX45DF29I5N
• Description: IC ARRIA II GX FPGA 45K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX45DF29I5N

• Number Of Logic Elements/cells: 42959
• Number Of Labs/clbs: 1805
• Total Ram Bits: 3435
• Number Of I /o: 364
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 45125
• # I/os (max): 364
• Frequency (max): 500MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 45125
• Ram Bits: 3565158.4
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

8–34
Arria II Device Handbook Volume 1: Device Interfaces and Integration
A corner PLL and a center PLL can drive duplex channels in the same I/O bank, if the
channels driven by each PLL are not interleaved. No separation is necessary between
the group of channels driven by the corner and center left and right PLLs. Refer to
Figure 8–27
Figure 8–28. Invalid Placement of DPA-Disabled Differential I/Os Due to Interleaving of Channels
Driven by the Corner and Center PLLs
and
Figure
8–28.
Chapter 8: High-Speed Differential I/O Interfaces and DPA in Arria II Devices
DPA-disabled
DPA-disabled
DPA-disabled
DPA-disabled
DPA-disabled
DPA-disabled
DPA-disabled
DPA-disabled
Reference CLK
Reference CLK
DPA-disabled
DPA-disabled
Diff I/O
Diff I/O
Diff I/O
Diff I/O
Diff I/O
Diff I/O
Diff I/O
Diff I/O
Diff I/O
Diff I/O
Center
Center
PLL
PLL
Differential Pin Placement Guidelines
December 2010 Altera Corporation