mcf5272 Freescale Semiconductor, Inc, mcf5272 Datasheet - Page 76

• Manufacturer Part Number: mcf5272
• Description: Mcf5272 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

Programming Model
2.2.1.6 MAC Programming Model
Figure 2-3 shows the registers in the MAC portion of the user programming model. These
registers are described as follows:
2.2.2 Supervisor Programming Model
The MCF5272 supervisor programming model is shown in Figure 2-3. Typically, system
programmers use the supervisor programming model to implement operating system
functions and provide memory and I/O control. The supervisor programming model
provides access to the user registers and additional supervisor registers, which include the
upper byte of the status register (SR), the vector base register (VBR), and registers for
configuring attributes of the address space connected to the Version 2 processor core. Most
supervisor-mode registers are accessed by using the MOVEC instruction with the control
register definitions in Table 2-2.
2.2.2.1 Status Register (SR)
The SR stores the processor status, the interrupt priority mask, and other control bits.
Supervisor software can read or write the entire SR; user software can read or write only
SR[7–0], described in Section 2.2.1.5, “Condition Code Register (CCR).” The control bits
indicate processor states—trace mode (T), supervisor or user mode (S), and master or
interrupt state (M). SR is set to 0x27xx after reset.
2-8
• Accumulator (ACC)—This 32-bit, read/write, general-purpose register is used to
• Mask register (MASK)—This 16-bit general-purpose register provides an optional
• MAC status register (MACSR)—This 8-bit register defines configuration of the
accumulate the results of MAC operations.
address mask for MAC instructions that fetch operands from memory. It is useful in
the implementation of circular queues in operand memory.
MAC unit and contains indicator flags affected by MAC instructions. Unless noted
otherwise, MACSR indicator flag settings are based on the final result, that is, the
result of the final operation involving the product and accumulator.
Rc[11–0]
0xC0F
0xC00
0xC04
0x002
0x004
0x005
0x801
Table 2-2. MOVEC Register Map
Cache control register (CACR)
Access control register 0 (ACR0)
Access control register 1 (ACR1)
Vector base register (VBR)
ROM base address register
RAM base address register (RAMBAR)
Module base address register (MBAR)
MCF5272 User’s Manual
Register Definition
MOTOROLA