mcf5272 Freescale Semiconductor, Inc, mcf5272 Datasheet - Page 293

no-image

mcf5272

Manufacturer Part Number
mcf5272
Description
Mcf5272 Coldfire Integrated Microprocessor User
Manufacturer
Freescale Semiconductor, Inc
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
mcf5272CVF66
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mcf5272CVF66
Manufacturer:
FREESCALE
Quantity:
20 000
Part Number:
mcf5272CVF66 K75N
Manufacturer:
ST
Quantity:
18
Part Number:
mcf5272CVF66J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mcf5272CVM66
Manufacturer:
MOT
Quantity:
3
Part Number:
mcf5272CVM66
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mcf5272CVM66
Manufacturer:
FREESCALE
Quantity:
20 000
Part Number:
mcf5272CVM66
0
Company:
Part Number:
mcf5272CVM66
Quantity:
6 000
Part Number:
mcf5272CVM66J
Manufacturer:
NSC
Quantity:
36
Part Number:
mcf5272CVM66J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mcf5272CVM66R2
0
Part Number:
mcf5272NF66K75N
Manufacturer:
MOTOROLA
Quantity:
2
Part Number:
mcf5272VF66
Manufacturer:
HYNIX
Quantity:
19
Part Number:
mcf5272VF66
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mcf5272VF66
Manufacturer:
FREESCALE
Quantity:
20 000
MOTOROLA
registers and the user is notified of the request with the VEND_REQ interrupt. The user
must take the following step to process a class or vendor request:
12.4.6
The MCF5272 supports USB
sources are for remote wakeup capability. The three different resume mechanisms are listed
below:
12.4.7 Endpoint Halt Feature
USB has the ability to halt endpoints due to errors. The user is notified when an endpoint
is halted and when the halt is cleared. When an endpoint is halted, the user should abort the
current transfer and reinitialize the FIFO for the endpoint. An endpoint can be halted for a
variety of reasons.
1. Read DRR1 and DRR2 to determine the request type.
2. If the request has a data stage, the EP0 FIFO should be read or written with the
3. When the user has finished processing the request, EP0CTL[CMD_OVER] must be
• The user sets EP0CTL[RESUME]. The USB module responds to this only if the
• The wake-on-ring INT1 interrupt pin is at the active level defined in EP0CTL. The
• The USB module detects any activity on the USB, which may be normal bus activity,
• EPnCTL[STALL] is set by the user. This bit should be set only when there is a
• On control endpoints, an error processing a request.
number of bytes as defined in the DRR2[wLength]. Refer to for more details on
accessing the FIFOs.
set to signal completion of the request. [CMD_ERR] must also be set
simultaneously if an error was encountered while processing the request.
USB is in the suspended state and EP0SR[WAKE_ST] is set. The ColdFire core
must be running to write E0PCTL. To meet USB timing specifications, the
RESUME bit must not be set until two milliseconds have elapsed since the USB
module entered suspend state.
USB module responds to the INT1 pin only if the wake-on-ring function is enabled,
the USB is in the suspended state and EP0SR[WAKE_ST] is set. The ColdFire core
may be powered down, and the resume signaling wakes up the ColdFire core. The
wake-on-ring function must not be enabled until two milliseconds have elapsed
since the USB module entered the suspend state in order to meet USB specification
timing requirements.
resume signaling, or reset signaling. The ColdFire core may be powered down, and
the resume signaling wakes up the ColdFire core.
SET
critical error on the endpoint.
_
REMOTE WAKEUP
FEATURE
request with the endpoint halt feature selector set.
Chapter 12. Universal Serial Bus (USB)
RESUME
and
initiated from three different sources. Two of the
RESUME
Software Architecture and Application Notes
Operation
12-33

Related parts for mcf5272