mcf5272 Freescale Semiconductor, Inc, mcf5272 Datasheet - Page 457

• Manufacturer Part Number: mcf5272
• Description: Mcf5272 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

MOTOROLA
20.2.4 Transfer Acknowledge (TA)
This active-low synchronous input signal indicates the successful completion of a requested
data transfer operation. During MCF5272-initiated transfers, transfer acknowledge (TA) is
an asynchronous input signal from the referenced slave device indicating completion of the
transfer.
The MCF5272 edge-detects and retimes the TA input. This means that an additional wait
state may or may not be inserted. For example if the active chip select is used to
immediately generate the TA input, one or two wait states may be inserted in the bus access.
The TA signal function is not available after reset. It must be enabled by configuring the
appropriate pin configuration register bits along with the value of CSORn[WS]. If TA is not
used, it should either have a pullup resistor or be driven through gating logic that always
ensures the input is inactive. TA should be negated on the negating edge of the active chip
select.
TA must always be negated before it can be recognized as asserted again. If held asserted
into the following bus cycle, it has no effect and does not terminate the bus cycle.
TA is not used for termination during SDRAM accesses.
20.2.5 Transfer Error Acknowledge (TEA)
An external slave asserts this active-low input signal to abort a transfer. The assertion of
TEA immediately aborts the bus cycle. The assertion of TEA has precedence over the
assertion of TA.
The MCF5272 edge-detects and retimes the TEA input. TEA is an asynchronous input
signal.
The TEA signal function is available after reset. If TEA is not used, a pullup resistor or
gating logic must be used to ensure the input is inactive. TEA should be negated on the
negating edge of the active chip select. TEA must always be negated before it can be
recognized as asserted again. If held asserted into the following bus cycle, it has no effect
and does not abort the bus cycle.
TEA has no affect during SDRAM accesses.
For the MCF5272 to accept the transfer as successful with a
transfer acknowledge, TEA must be negated throughout the
transfer.
Chapter 20. Bus Operation
NOTE:
Bus and Control Signals
20-3