mcf5272 Freescale Semiconductor, Inc, mcf5272 Datasheet - Page 29

• Manufacturer Part Number: mcf5272
• Description: Mcf5272 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

Figure
Number
MOTOROLA
18-2
18-3
18-4
19-1
20-1
20-2
20-3
20-4
20-5
20-6
20-7
20-8
20-9
20-10
20-11
20-12
20-13
20-14
20-15
20-16
20-17
20-18
20-19
20-20
20-21
20-22
20-23
20-24
21-1
21-2
21-3
21-4
21-5
21-6
21-7
21-8
22-1
22-2
23-1
23-2
23-3
PWM Control Registers (PWCRn)............................................................................. 18-3
PWM Width Register (PWWDn) ............................................................................... 18-4
PWM Waveform Examples (PWCRn[EN] = 1)......................................................... 18-5
MCF5272 Block Diagram with Signal Interfaces ...................................................... 19-2
Internal Operand Representation ................................................................................ 20-5
MCF5272 Interface to Various Port Sizes .................................................................. 20-6
Longword Read; EBI = 00; 32-Bit Port; Internal Termination .................................. 20-9
Word Write; EBI = 00; 16-/32-Bit Port; Internal Termination................................. 20-10
Longword Read with Address Setup; EBI = 00; 32-Bit Port; Internal Termination 20-10
Longword Write with Address Setup; EBI = 00; 32-Bit Port; Internal Termination 20-11
Longword Read with Address Hold; EBI = 00; 32-Bit Port; Internal Termination . 20-11
Longword Write with Address Hold; EBI = 00; 32-Bit Port; Internal Termination 20-12
Longword Read; EBI = 00; 32-Bit Port; Terminated by TA with One Wait State .. 20-12
Longword Read; EBI=11; 32-Bit Port; Internal Termination .................................. 20-13
Word Write; EBI=11; 16/32-Bit Port; Internal Termination .................................... 20-14
Read with Address Setup; EBI=11; 32-Bit Port; Internal Termination.................... 20-15
Longword Write with Address Setup; EBI=11; 32-Bit Port; Internal Termination . 20-15
Read with Address Hold; EBI=11; 32-Bit Port; Internal Termination ..................... 20-16
Longword Write with Address Hold; EBI=11; 32-Bit Port; Internal Termination .. 20-16
Longword Read with Address Setup and Address Hold; EBI = 11; 32-Bit Port,
Internal Termination ................................................................................................. 20-17
Longword Write with Address Setup and Address Hold; EBI = 11; 32-Bit Port,
Internal Termination ................................................................................................. 20-17
Example of a Misaligned Longword Transfer .......................................................... 20-19
Example of a Misaligned Word Transfer.................................................................. 20-19
Longword Write Access To 32-Bit Port Terminated with TEA Timing .................. 20-21
Master Reset Timing................................................................................................. 20-23
Normal Reset Timing................................................................................................ 20-24
Software Watchdog Timer Reset Timing ................................................................. 20-25
Soft Reset Timing ..................................................................................................... 20-27
Test Access Port Block Diagram ................................................................................ 21-2
TAP Controller State Machine.................................................................................... 21-4
Output Cell (O.Cell) (BC–1)....................................................................................... 21-5
Input Cell (I.Cell). Observe only (BC–4) ................................................................... 21-5
Output Control Cell (En.Cell) (BC–4)........................................................................ 21-6
Bidirectional Cell (IO.Cell) (BC–6) ........................................................................... 21-6
General Arrangement for Bidirectional Pins .............................................................. 21-7
Bypass Register........................................................................................................... 21-8
MCF5272 Pinout (196 MAPBGA)............................................................................. 22-1
196 MAPBGA Package Dimensions (Case No. 1128A-01) ...................................... 22-2
Clock Input Timing Diagram...................................................................................... 23-5
General Input Timing Requirements .......................................................................... 23-7
Read/Write SRAM Bus Timing.................................................................................. 23-9
ILLUSTRATIONS
Illustrations
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