mcf5272 Freescale Semiconductor, Inc, mcf5272 Datasheet - Page 333

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mcf5272

Manufacturer Part Number
mcf5272
Description
Mcf5272 Coldfire Integrated Microprocessor User
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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MOTOROLA
In the previous example, Motorola’s MC14LC5480 CODECs and MC145574 S/T
transceiver are shown. The S/T transceiver in this example is connected to port 0 and the
FSC0 frame sync signal is used exclusively for synchronizing the data on the transceiver’s
IDL interface. CODECs 1 and 2 are connected to frame sync 1, FSC1. CODECs 3 and 4
are connected to DFSC2 which is the output of programmable delay 2. Programmable
delay 2 generates a delayed frame sync with reference to FSC1. Similarly CODECs 5 and
6 are connected to DFSC3 which is the output of programmable delay 3. Programmable
delay 3 generates a delayed frame sync also with reference to FSC1. The MC14LC5480
CODECs, when in IDL mode, may be programmed using the FSR pin, to select whether
Interface 1
Interface 0
MCF5272
Chapter 13. Physical Layer Interface Controller (PLIC)
Figure 13-37. ISDN SOHO PABX Example
DFSC2
DFSC3
DGNT0
DREQ0
Dout1
DCL1
Dout0
FSC1
DCL0
FSC0
Din1
Din0
Tx
Rx
IDL SYNC
DT
DR
DT
DR
DT
DR
FST
BCLKT
DGrant
IDL CLK
FST
BCLKT
DT
DR
FST
BCLKT
FST
BCLKT
DT
DR
FST
BCLKT
DT
DR
FST
BCLKT
DRequest
MC14LC5480
MC14LC5480
MC14LC5480
MC14LC5480
MC14LC5480
MC14LC5480
MC145574
CODEC 2
CODEC 3
CODEC 4
CODEC 1
CODEC5
CODEC6
BCLKR
BCLKR
BCLKR
BCLKR
BCLKR
BCLKR
FSR
FSR
FSR
FSR
FSR
FSR
Vdd
GND
Vdd
Vdd
GND
Vdd
Vdd
GND
Vdd
Application Examples
13-37

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