mcf5272 Freescale Semiconductor, Inc, mcf5272 Datasheet - Page 336

• Manufacturer Part Number: mcf5272
• Description: Mcf5272 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

DFSC2
DFSC3
Application Examples
Figure 13-40 shows the IDL bus timing relationship of the CODECs and U transceiver
when in standard IDL2 10-bit mode with a common frame sync.
Dout1
In the above example, CODEC 1 transmits and receives in the B3 time slot once the
U transceiver has completed the D channel. From the rising edge of FSC1, this is at least
19 DCL clocks later. In Figure 13-40, a short, optional delay, is shown between the end of
the D channel and the start of the B3 channel. For example, let us say this is 1 DCL clocks
long. This defines the programmable delay 1 value to be 20, (19 + 1), or 0x0014. The
DFSC3 signal synchronizes CODECs 3 and 4, and the rising edge of this frame sync occurs
20 clocks after DFSC2, therefore 40 DCL clocks after FSC1. This defines the value for
programmable delay 3 to be 40, (19 + 1 + 20), or 0x0028.
13.6.5 Example 3: Two-Line Remote Access with Ports 0
In this example, ports 0 and 1 are connected to two S/T transceivers. Ports 0 and 1 are
programmed in slave mode. Ports 2 and 3 are not used, and may be disabled.
FSC1
13-40
Din1/
DCL
and 1
B1
U Transceiver
D
Figure 13-40. Standard IDL2 10-bit mode.
B2
D
MCF5272 User’s Manual
CODEC 1
B3
CODEC 2
B4
CODEC 3
B5
CODEC 4
MOTOROLA
B6