mcf5272 Freescale Semiconductor, Inc, mcf5272 Datasheet - Page 460

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mcf5272

Manufacturer Part Number
mcf5272
Description
Mcf5272 Coldfire Integrated Microprocessor User
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Data Transfer Mechanism
The multiplexer takes the four bytes of the 32-bit bus and routes them to their required
positions. For example, OP3 can be routed to D[7:0], as would be the normal case when
interfacing to a 32-bit port. OP3 can be routed to D[23:16] for interfacing to a 16-bit port,
or it can be routed to D[31:24] for interfacing to an 8-bit port. The operand size, address,
and port size of the memory being accessed determines the positioning of bytes.
Table 20-3 through Table 20-5 describe data bus byte strobes. Note that most SDRAMs
associate DQM3 with the MSB, thus BS3 should be connected to the SDRAM's DQM3
input.
20-6
REGISTER
MULTIPLEXER
EXTERNAL
ADDRESS
DATA BUS
BS3 BS2 BS1 BS0
A1
Table 20-3. Byte Strobe Operation for 32-Bit Data Bus
Figure 20-2. MCF5272 Interface to Various Port Sizes
0
0
1
0
0
1
1
1
1
1
1
0
1
0
0
1
1
1
0
A0
0
0
0
0
1
0
1
1
1
1
0
1
1
0
0
1
1
0
1
1
1
0
1
1
0
1
0
1
0
1
1
D[31:24]
BYTE 0
BYTE 0
BYTE 2
BYTE 0
BYTE 1
BYTE 2
BYTE 3
OP0
1
0
1
1
1
0
1
0
0
1
1
1
ROUTING AND DUPLICATION
MCF5272 User’s Manual
FLASH/SRAM
FLASH/SRAM
FLASH/SRAM
FLASH/SRAM
FLASH/SRAM
FLASH/SRAM
FLASH/SRAM
Access Type
D[23:16]
BYTE 1
BYTE 1
BYTE 3
SDRAM
SDRAM
SDRAM
SDRAM
OP1
None
8-BIT PORT
BYTE 2
D[15:8]
OP2
Access Size Data Located On
Longword
None
16-BIT PORT
Word
Byte
Byte
BYTE 3
D[7:0]
OP3
D[31:24]
D[23:16]
D[31:16]
D[23:16]
D[31:24]
D[15:8]
D[15:0]
D[31:0]
D[15:8]
D[7:0]
D[7:0]
32-BIT PORT
INTERNAL TO
MCF5272
MOTOROLA

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