mcf5272 Freescale Semiconductor, Inc, mcf5272 Datasheet - Page 144

• Manufacturer Part Number: mcf5272
• Description: Mcf5272 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

Background Debug Mode (BDM)
5.5.3.3 Command Set Descriptions
The following sections describe the commands summarized in Table 5-17.
Motorola reserves unassigned command opcodes for future expansion. Unused command
formats in any revision level perform a
5.5.3.3.1 Read A/D Register (
Read the selected address or data register and return the 32-bit result. A bus error response
is returned if the CPU core is not halted.
Command/Result Formats:
Command Sequence:
Operand Data:
Result Data:
5-22
Command
Result
• Results are returned in the two serial transfer cycles after the memory access
completes. For any command performing a byte-sized memory read operation, the
upper 8 bits of the response data are undefined and the referenced data is returned in
the lower 8 bits. The next command’s opcode is sent to the debug module during the
final transfer. If a memory or register access is terminated with a bus error, the error
status (S = 1, DATA = 0x0001) is returned instead of result data.
15
The BDM status bit (S) is 0 for normally completed
commands; S = 1 for illegal commands, not-ready responses,
and transfers with bus-errors. Section 5.5.2, “BDM Serial
Interface,” describes the receive packet format.
Figure 5-18.
0x2
Figure 5-17.
None
The contents of the selected register are returned as a longword
value, most-significant word first.
RAREG/RDREG
12
???
11
RAREG
RAREG
MCF5272 User’s Manual
RAREG
0x1
NOP
/
RDREG
NOTE:
/
RDREG
/
MS RESULT
and return an illegal command response.
RDREG
BERR
XXX
XXX
D[31:16]
8
D[15:0]
Command Sequence
Command Format
)
7
LS RESULT
"NOT READY"
NEXT CMD
NEXT CMD
0x8
4
A/D
3
2
MOTOROLA
Register
0