mcf5272 Freescale Semiconductor, Inc, mcf5272 Datasheet - Page 475

• Manufacturer Part Number: mcf5272
• Description: Mcf5272 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

MOTOROLA
Clock 1 (C1)
The write cycle starts in C1. During C1, the MCF5272 places valid values on the address
bus (A[22:0]) and the chip select signal.
Clock 2 (C2)
During C2, the MCF5272 drives the data bus, the byte strobes, and R/W.
Clock 3 (C3)
During C3, the selected device detects an error and asserts TEA. At the end of C3 or Cx,
the MCF5272 samples the level of TEA. If it is asserted, the transfer of the longword is
aborted and the transfer terminates.
Figure 20-20. Longword Write Access To 32-Bit Port Terminated with TEA Timing
SDCLK
A[22:0]
D[31:0]
OE
R/W
CSn
BS[3:0]
TEA
(H)
This example shows TEA being asserted during C3. TEA can
be asserted earlier or later than C3.
If TA is asserted when debug transfer error-acknowledge
(TEA) is asserted, the transfer is terminated with a bus error.
C1
Chapter 20. Bus Operation
C2
NOTE:
NOTE:
C3
Cx
C4
Bus Errors
20-21