mcf5272 Freescale Semiconductor, Inc, mcf5272 Datasheet - Page 352

• Manufacturer Part Number: mcf5272
• Description: Mcf5272 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

Programming Model
14.5.5 QSPI Address Register (QAR)
The QAR, shown in Figure 14-8, is used to specify the location in the QSPI RAM that read
and write operations affect.
14.5.6 QSPI Data Register (QDR)
The QDR, shown in Figure 14-9, is used to access QSPI RAM indirectly. The CPU reads
and writes all data from and to the QSPI RAM through this register.
14.5.7 Command RAM Registers (QCR0–QCR15)
The command RAM is accessed using the upper byte of QDR. The QSPI cannot modify
information in command RAM.
There are 16 bytes in the command RAM. Each byte is divided into two fields. The chip
select field enables external peripherals for transfer. The command field provides transfer
operations.
Figure 14-10 shows the command RAM register.
Address
Address
14-14
Reset
Reset
Field
Field
R/W
R/W
15
15
The QAR does not wrap after the last queue entry within each
section of the RAM.
The command RAM is accessed only using the most significant
byte of QDR and indirect addressing based on QAR[ADDR].
Figure 14-8. QSPI Address Register
Figure 14-9. QSPI Data Register
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MCF5272 User’s Manual
0000_0000_0000_0000
0000_0000_0000_0000
NOTE:
NOTE:
MBAR + 0x00B0
MBAR + 0x00B4
DATA
R/W
R/W
6
5
ADDR
MOTOROLA
0
0