mcf5272 Freescale Semiconductor, Inc, mcf5272 Datasheet - Page 169

• Manufacturer Part Number: mcf5272
• Description: Mcf5272 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

MOTOROLA
The following example shows how to set the MBAR to location 0x1000_0000 using the D0
register. Setting MBAR[V] validates the MBAR location. This example assumes all
accesses are valid:
move.1 #0x10000001,DO
movec DO,MBAR
6.2.3 System Configuration Register (SCR)
The system configuration register (SCR), Figure 6-3, provides information and control for
a variety of system features.
Table 6-3 describes SCR fields.
13–12 RSTSRC Reset source. Indicates the source of the last device reset.
31–16
15-14
11–9
15–5
Bits
Bits
Address
4
3
2
1
0
Reset 1
Field 1
R/W
Field
UD
BA
SC
SD
UC
—
Field
V
15
—
—
14
0
0
Base address. Defines the base address for a 64-Kbyte address range
Reserved, should be cleared.
Setting masks supervisor code space in MBAR address range
Setting masks supervisor data space in MBAR address range
Setting masks user code space in MBAR address range
Setting masks user data space in MBAR address range
Valid. Determines whether MBAR settings are valid.
0 MBAR contents are invalid.
1 MBAR contents are valid.
Reserved. Bit 15 always reads as a 1, bit 14 as a 0. Writing to these bits has no effect.
00 Reserved
01 RSTI asserted, DRESETEN not asserted
10 Software watchdog
11 RSTI and DRESETEN asserted
Reserved, should be cleared.
seeTable 6-3
13
Figure 6-3. System Configuration Register (SCR)
RSTSRC
Chapter 6. System Integration Module (SIM)
12
Table 6-2. MBAR Field Descriptions
Table 6-3. SCR Field Descriptions
R/W; except for RSTSRC[1:0], which are read only
11
—
9
Priority
8
MBAR + 0x004
AR SoftRST
Description
7
Description
0000_1000_0111
6
5
—
4
BusLock
.
3
Programming Model
2
HWR
0
6-5