mcf5272 Freescale Semiconductor, Inc, mcf5272 Datasheet - Page 246

• Manufacturer Part Number: mcf5272
• Description: Mcf5272 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

Programming Model
11.5.12 FIFO Transmit Start Register (TFSR)
The TFSR register, Figure 11-15, can be programmed by the user to indicate the starting
address of the transmit FIFO. Usually there is no need to program TFSR. For optimal RAM
allocation, do not program TFSR to a value less than its reset value. The value in this
register must be added to MBAR + 0x800 to determine the absolute address.
The TFSR register is reset to the first available RAM address.
Table 11-19 describes the TFSR fields.
11.5.13 Receive Control Register (RCR)
The RCR register, Figure 11-16, controls the operational mode of the receive block.
11-22
Reset
Reset
Field
Field
Addr
R/W
R/W
31–11
Bits
9–2
1–0
10
31
15
X_FSTART Transmit FIFO starting address. Address of first transmit FIFO location.
Name
—
—
—
0000_0
Figure 11-15. FIFO Transmit Start Register (TFSR)
—
Reserved, should be cleared.
Reserved, should be set.
Reserved, should be cleared.
Table 11-19. TFSR Field Descriptions
11
10
MCF5272 User’s Manual
1
1
0000_0000_0000_0000
9
MBAR + 0x8EC
Read/Write
Read/Write
—
Description
X_FSTART
0001_1000
2
MOTOROLA
1
—
00
16
0