mcf5272 Freescale Semiconductor, Inc, mcf5272 Datasheet - Page 31

• Manufacturer Part Number: mcf5272
• Description: Mcf5272 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

Table
Number
MOTOROLA
2-1
2-2
2-3
2-4
2-5
2-6
2-7
2-8
2-9
2-10
2-11
2-12
2-13
2-14
2-15
2-16
2-17
2-18
2-19
2-20
2-21
3-1
4-1
4-2
4-3
4-4
4-5
4-6
4-7
4-8
4-9
5-1
5-2
5-3
5-4
5-5
CCR Field Descriptions ............................................................................................... 2-7
MOVEC Register Map ................................................................................................. 2-8
Status Field Descriptions .............................................................................................. 2-9
Integer Data Formats................................................................................................... 2-10
User-Mode Instruction Set Summary ......................................................................... 2-16
Move Byte and Word Execution Times...................................................................... 2-21
One-Operand Instruction Execution Times ................................................................ 2-22
Two-Operand Instruction Execution Times................................................................ 2-23
Miscellaneous Instruction Execution Times............................................................... 2-24
General Branch Instruction Execution Times............................................................. 2-25
Exception Vector Assignments................................................................................... 2-27
Format Field Encoding ............................................................................................... 2-28
Fault Status Encodings................................................................................................ 2-28
MCF5272 Exceptions ................................................................................................. 2-29
MAC Instruction Summary........................................................................................... 3-4
Memory Map of Instruction Cache Registers............................................................... 4-2
RAMBAR Field Description ........................................................................................ 4-3
Examples of Typical RAMBAR Settings ..................................................................... 4-5
ROMBAR Field Description ........................................................................................ 4-6
Examples of Typical ROMBAR Settings ..................................................................... 4-7
Instruction Cache Operation as Defined by CACR[CENB,CEIB]............................. 4-12
Memory Map of Instruction Cache Registers............................................................. 4-13
CACR Field Descriptions ........................................................................................... 4-13
ACRn Field Descriptions............................................................................................ 4-15
Debug Module Signals.................................................................................................. 5-2
Processor Status Encoding............................................................................................ 5-3
BDM/Breakpoint Registers........................................................................................... 5-6
Rev. A Shared BDM/Breakpoint Hardware ................................................................. 5-7
AATR Field Descriptions ............................................................................................. 5-8
ColdFire Effective Addressing Modes....................................................................... 2-13
Notational Conventions ............................................................................................. 2-14
Supervisor-Mode Instruction Set Summary............................................................... 2-19
Misaligned Operand References ................................................................................ 2-20
Move Long Execution Times..................................................................................... 2-21
Move Execution Times .............................................................................................. 2-22
Bcc Instruction Execution Times............................................................................... 2-26
TABLES
Tables
Title
Number
Page
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