mcf5272 Freescale Semiconductor, Inc, mcf5272 Datasheet - Page 215

• Manufacturer Part Number: mcf5272
• Description: Mcf5272 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

MOTOROLA
Figure 9-14 shows the timing for entering SDRAM self-refresh mode. During a
PRECHARGE ALL
back into the SDRAM array. The SDTR[RP] value determines the number of dead cycles
after a precharge. Note that auto refresh occurs in T3. SDTR[RC] determines the number
of clock cycles the SDRAM remains in refresh state, during which time it cannot accept
other commands.
A10_PRECHG
SDADR[13:0]
SDBA[1:0]
SDCLKE
SDCLK
SDWE
SDCS
RAS0
CAS0
(H)
command (T1), the SDRAM writes all of its on-chip RAM page buffers
T0
Precharge
All Banks
T1
Figure 9-13. SDRAM Refresh Cycle
Chapter 9. SDRAM Controller
T2
NOP
T3
Refresh
Auto
T4
T5
T6
t
RC
T7
SDRAM Interface
Next Command
T8
T9
9-21