mcf5272 Freescale Semiconductor, Inc, mcf5272 Datasheet - Page 239

• Manufacturer Part Number: mcf5272
• Description: Mcf5272 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

MOTOROLA
11.5.5 Receive Descriptor Active Register (RDAR)
The RDAR register, Figure 11-8, is a command register that should be written by the user
to indicate that the receive descriptor ring has been updated (empty receive buffers have
been produced by the driver with the E bit set).
The R_DES_ACTIVE bit is set whenever the register is written. This is independent of the
data actually written by the user. When set, the FEC polls the receive descriptor ring and
processes receive frames (provided ETHER_EN is also set). As soon as the FEC polls a
receive descriptor whose E bit is not set, it clears the R_DES_ACTIVE bit and stops polling
the receive descriptor ring.
The RDAR register is cleared at reset and when ETHER_EN is cleared.
Reset
Reset
Field
Field
Addr
R/W
R/W
31–4
3–2
1–0
Bit
31
15
Name
IVEC
—
—
Reserved, should be cleared.
Interrupt vector. IVEC gives the highest outstanding priority FEC interrupt. The bit field
meanings (from low priority to high priority) are as follows:
00 No pending FEC interrupt
01 Non-time critical interrupt (All interrupts except TXB, TXF, RXB, and RXF.)
10 Transmit interrupt
11 Receive interrupt
Reserved, should be cleared.
—
Table 11-10. IVSR Field Descriptions
Figure 11-8. RDAR Register
Chapter 11. Ethernet Module
25
R_DES_ACTIVE
0000_0000_0000_0000
0000_0000_0000_0000
24
MBAR + 0x850
Read/Write
Read/Write
—
Description
23
—
Programming Model
11-15
16
0