mcf5272 Freescale Semiconductor, Inc, mcf5272 Datasheet - Page 378

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mcf5272

Manufacturer Part Number
mcf5272
Description
Mcf5272 Coldfire Integrated Microprocessor User
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Register Descriptions
16.3.16 UART Input Port Registers (UIPn)
The UIP registers, Figure 16-19, show the current state of the CTS input.
Table 16-13 describes UIPn fields.
16.3.17 UART Output Port Command Registers
The RTS output can be asserted by writing a 1 to UOP1n[RTS] and negated by writing a 1
to UOP0n[RTS]. See Figure 16-20.
Table 16-14 describes UOP1 and UOP0 fields.
16-18
Reset
Bits
Field
Addr
7–1
Address
Bits
7–1
R/W
0
0
Reset
Field
R/W
Name
Name
CTS
(UOP1n/UOP0n)
RTS
Figure 16-20. UART Output Port Command Registers (UOP1/UOP0)
7
7
Reserved, should be cleared.
CTS state.The CTS value is latched and reflects the state of the input pin when UIPn is read. Note:
This bit has the same function and value as UIPCRn[RTS].
0 The current state of the CTS input is logic 0.
1 The current state of the CTS input is logic 1.
Reserved, should be cleared.
Output port parallel output. Controls assertion (UOP1)/negation (UOP0) of RTS output.
0 Not affected.
1 Asserts RTS (UOP1). Negates RTS (UOP0).
UART0: MBAR + 0x138 (UOP1), 0x13C (UOP0); UART1 0x178 (UOP1), 0x17C (UOP0)
Figure 16-19. UART Input Port Registers (UIPn)
Table 16-14. UOP1/UOP0 Field Descriptions
Table 16-13. UIPn Field Descriptions
MCF5272 User’s Manual
MBAR + 0x134 (UIP0), 0x174 (UIP1)
0000_0000
Write only
1111_1111
Read only
Description
Description
1
1
MOTOROLA
RTS
CTS
0
0

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