mcf5272 Freescale Semiconductor, Inc, mcf5272 Datasheet - Page 219

• Manufacturer Part Number: mcf5272
• Description: Mcf5272 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

MOTOROLA
Chapter 10
DMA Controller
The MCF5272 has a one-channel DMA controller that supports memory-to-memory DMA
transfers that can be used for block data moves. This chapter describes in detail its signals,
registers, and operating modes.
10.1 DMA Data Transfer Types
A source and destination address must be specified for any dual-address DMA transfer.
These addresses can have different data transfer types, but there is always a read from the
source address followed by a write to the destination address. On the MCF5272, sources
and destinations can be SDRAM, external SRAM, or on-chip peripheral in any
combination.
Note that transfers to on-chip peripherals are limited by the transfer type supported by a
specific peripheral.
Memory-to-memory DMA transfers run to completion if the
assume request bit in the system configuration register,
SCR[AR], is set. This generally prevents the CPU from
recognizing interrupts and blocks bus accesses by other
on-chip bus masters. It is best not to enable SCR[AR] when the
DMA controller is in use. When AR = 0, the DMA controller
allows the CPU and Ethernet controller to obtain bus access.
Byte (8 bits)
Word (16 bits)
Longword (32 bits)
Burst (4 x longword)
Transfer Type
Table 10-1. DMA Data Transfer Matrix
Chapter 10. DMA Controller
SDRAM External SRAM On-Chip Peripheral
Yes
Yes
Yes
Yes
Source or Destination Address
NOTE:
Yes
Yes
Yes
No
Yes
Yes
Yes
No
10-1