mcf5272 Freescale Semiconductor, Inc, mcf5272 Datasheet - Page 412

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mcf5272

Manufacturer Part Number
mcf5272
Description
Mcf5272 Coldfire Integrated Microprocessor User
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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PWM Programming Model
18.3.2 PWM Width Register (PWWDn)
This register, shown in Figure 18-3, controls the width of the output pulse. When the
counter become greater than or equal to the value in this register, the output is cleared for
the remainder of the period. When the counter overflows, or wraps around, the counter
value becomes less than or equal to the value of the width register and the output is set high.
Writing to the width register while the PWM is enabled will not alter the operation of the
PWM until the end of the current output cycle. That is, the width value is not modified until
after the counter has wrapped around. The PWM must be disabled and then re-enabled to
affect its operation before the end of the current output cycle.
Figure 18-4 shows example PWM waveforms and their dependence on PWWD[PW].
18-4
Bits
7–0
Name
PW
Address
Reset
Field
R/W
Pulse width. Range 0x00–0xFF. When the counter value become greater than PWWD[PW],
the output is cleared for the remainder of the period. When the counter overflows, or wraps
around, the counter value becomes less than or equal to PWWD[PW] and the output is set.
Figure 18-3. PWM Width Register (PWWDn)
MBAR + 0x0D0 (PWWD0); + 0x0D4 (PWWD1); + 0x0D8 (PWWD2)
7
Table 18-3. PWWDn Field Descriptions
MCF5272 User’s Manual
0000_0000
Description
PW
R/W
0
MOTOROLA

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