mcf5272 Freescale Semiconductor, Inc, mcf5272 Datasheet - Page 17

• Manufacturer Part Number: mcf5272
• Description: Mcf5272 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

MOTOROLA
17.3.3
17.4
17.4.1
18.1
18.2
18.3
18.3.1
18.3.2
19.1
19.2
19.3
19.4
19.4.1
19.5
19.6
19.6.1
19.6.2
19.6.3
19.6.4
19.6.5
19.6.6
19.6.7
19.6.8
19.6.9
19.6.10
19.6.11
19.6.12
19.6.13
19.7
19.7.1
19.7.2
19.7.3
19.7.4
19.8
Paragraph
Number
Port Data Registers ......................................................................................... 17-11
Overview........................................................................................................... 18-1
PWM Operation ................................................................................................ 18-2
PWM Programming Model............................................................................... 18-2
MCF5272 Block Diagram with Signal Interfaces ............................................ 19-1
Signal List ......................................................................................................... 19-2
Address Bus (A[22:0]/SDA[13:0]) ................................................................. 19-18
Data Bus (D[31:0]) ......................................................................................... 19-18
Chip Selects (CS7/SDCS, CS[6:0]) ................................................................ 19-19
Bus Control Signals ........................................................................................ 19-19
CPU Clock and Reset Signals......................................................................... 19-22
Interrupt Request Inputs (INT[6:1])................................................................ 19-23
Port C Data Direction Register (PCDDR) .................................................. 17-11
Port Data Register (PxDAT)....................................................................... 17-11
PWM Control Register (PWCRn) ................................................................ 18-3
PWM Width Register (PWWDn) ................................................................. 18-4
Dynamic Data Bus Sizing........................................................................... 19-18
Output Enable/Read (OE/RD) .................................................................... 19-19
Byte Strobes (BS[3:0])................................................................................ 19-19
Read/Write (R/W)....................................................................................... 19-21
Transfer Acknowledge (TA/PB5)............................................................... 19-21
Hi-Z............................................................................................................. 19-21
Bypass......................................................................................................... 19-22
SDRAM Row Address Strobe (RAS0)....................................................... 19-22
SDRAM Column Address Strobe (CAS0) ................................................. 19-22
SDRAM Clock (SDCLK)........................................................................... 19-22
SDRAM Write Enable (SDWE) ................................................................. 19-22
SDRAM Clock Enable (SDCLKE) ............................................................ 19-22
SDRAM Bank Selects (SDBA[1:0]) .......................................................... 19-22
SDRAM Row Address 10 (A10)/A10 Precharge (A10_PRECHG)........... 19-22
RSTI............................................................................................................ 19-22
DRESETEN ................................................................................................ 19-23
CPU External Clock (CLKIN).................................................................... 19-23
Reset Output (RSTO).................................................................................. 19-23
Pulse Width Modulation (PWM) Module
Signal Descriptions
CONTENTS
Chapter 18
Chapter 19
Contents
Title
Number
Page
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