mcf5272 Freescale Semiconductor, Inc, mcf5272 Datasheet - Page 193

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mcf5272

Manufacturer Part Number
mcf5272
Description
Mcf5272 Coldfire Integrated Microprocessor User
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Reset
MOTOROLA
8.2.2 Chip Select Option Registers (CSOR0–CSOR7)
CSOR0–CSOR7, Figure 8-2, are used to configure the address mask, additional setup/hold,
extended burst capability, wait states, and read/write access.
Table 8-5 describes CSORn fields.
Field
31–12
Addr
Name
R/W
11
10
31
WRAH
Name
ASET
BAM
Table 8-4. Chip Select Memory Address Decoding Priority
BAM
Figure 8-2. Chip Select Option Registers (CSORn)
Address mask. Masks equivalent CSOR[BA] bits. The BAM setting chooses which BA bits to
compare with the corresponding address bit to determine a match.
0 Mask address bit
1 Compare address bit
Address setup enable. Controls assertion of chip select with respect to assertion of a valid
address that hits in the chip select address space.
0 Assert chip select on the rising edge of CLK that address is asserted.
1 Delay assertion of chip select for one CLK cycle after address is asserted. During write
R/W asserts 1 clock cycle after assertion of the chip select.
Controls the address, data, and attribute hold time after the termination, internal or external
with TA, of a write cycle that hits in the chip select address space.
0 Do not hold address, data, and attribute signals an extra cycle after chip select and R/W
1 Hold address, data, and attribute signals an extra cycle after CSx and R/W negate on writes.
transfers, both chip select and R/W are delayed by 1 clock cycle.
negate on writes.
0x044 (CSOR0); 0x04C (CSOR1); 0x054 (CSOR2); 0x05C (CSOR3);
0x064 (CSOR4); 0x06C (CSOR5); 0x074 (CSOR6); 0x07C (CSOR7)
Table 8-5. CSORn Field Descriptions
12
ASET WRAH RDAH EXTBURST
Chapter 8. Chip Select Module
11
Priority
Highest
Lowest
10
0xFFFF_F078
9
R/W
Description
Chip select 0
Chip select 1
Chip select 2
Chip select 3
Chip select 4
Chip select 5
Chip select 6
Chip select 7
Chip Select
8
7
6
WS
Chip Select Registers
2
RW
1
MRW
0
8-5

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