mcf5272 Freescale Semiconductor, Inc, mcf5272 Datasheet - Page 372

• Manufacturer Part Number: mcf5272
• Description: Mcf5272 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

Register Descriptions
16.3.8 UART Input Port Change Registers (UIPCRn)
The input port change registers (UIPCRn), Figure 16-9, hold the current state and the
change-of-state for CTS.
Table 16-7 describes UIPCRn fields.
16.3.9 UART Auxiliary Control Registers (UACRn)
The UART auxiliary control registers (UACRn), Figure 16-7, control the input enable as
well as the RTS control based on the receiver FIFO level.
16-12
Bits Name
7–5
3–1
Address
Address
4
0
Reset
Reset
Field
Field
R/W
R/W
COS
CTS
—
—
Reserved, should be cleared.
Change of state (high-to-low or low-to-high transition).
0 No change-of-state since the CPU last read UIPCRn. Reading UIPCRn clears UISRn[COS].
1 A change-of-state longer than 25–50 µs occurred on the CTS input. UACRn can be programmed to
Reserved, should be cleared.
Current state. Starting two serial clock periods after reset, CTS reflects the state of CTS. If CTS is
detected asserted at that time, COS is set, which initiates an interrupt if UACRn[IEC] is enabled.
0 The current state of the CTS input is asserted.
1 The current state of the CTS input is negated.
7
7
generate an interrupt to the CPU when a change of state is detected.
Figure 16-9. UART Input Port Change Registers (UIPCRn)
Figure 16-8. UART Transmitter Buffers (UTBn)
—
Table 16-7. UIPCRn Field Descriptions
MBAR + 0x110 (UIPCR0), 0x150 (UIPCR1)
5
MCF5272 User’s Manual
0000_011
MBAR + 0x10C,0x14C
COS
4
0000_0000
Write only
Read only
Description
TB
3
111
1
MOTOROLA
CTS
CTS
0
0