mcf5272 Freescale Semiconductor, Inc, mcf5272 Datasheet - Page 539

• Manufacturer Part Number: mcf5272
• Description: Mcf5272 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

MOTOROLA
A
Access control register, 4-15
ACR0 and ACR1, 4-15
Activate low-power register, 6-10
Address bus, 20-2
Address variant, 5-4
Addressing
Addressing mode summary, 2-12
Arbitration, bus, 20-22
Architecture overview, 1-4
Async inputs signal timing, 23-17
Audience, xxxix
B
Baud rate
Branch instruction execution
Buffer descriptors
Buffering and impedance matching, B-1
Bus
Byte strobes, 20-8
mode summary, 2-12
calculating, 16-21
selection, 14-6
timing, 2-25
Ethernet, 11-32
USB controller, 11-32
arbitration, 20-22
burst data transfers, 20-18
configurations overview, 1-7
data transfer mechanism, 20-4
errors, 20-20
exceptions, 20-4
external interface, 1-5
external interface types, 20-8
interface for FLASH/SRAM, 20-8
interrupt acknowledge cycles, 20-19
master reset, 20-23
misaligned operands, 20-18
normal reset, 20-24
read/write (R/W), 20-2
reset operation, 20-22
sizing, 20-5
soft reset operation, 20-26
software watchdog timer reset operation, 20-25
transfer acknowledge (TA), 20-3
transfer error acknowledge (TEA), 20-3
INDEX
Index
C
Cache
Cache control register, 4-13
Caches
CAM interface, 11-7
CCR, 2-7
Chip select
Chip selects
Clock generator, USB, 12-4
ColdFire
ColdFire core
Condition code register, 2-7
Conventions
Core
D
Data
Debug
configuration register, 2-9
registers, access control, 2-10
coherency and validation, 4-9
miss fetch algorithm/line fills, 4-11
base registers, 8-3
CS0 special case, 8-2
option registers, 8-5
overview, features, usage, 8-1
registers, 8-2
general overview, 1-5
documentation, xlii
addressing mode summary, 2-12
condition code register (CCR), 2-7
exception processing overview, 2-26
features and enhancements, 2-1
instruction set summary, 2-13
integer data formats, 2-10
programming model, 2-5
status register, 2-8
supervisor programming model, 2-8
user programming mode, 2-6
notational, xliii
terminology, xlv
version 2
bus, 20-2
attribute trigger register, 5-7
BDM command set summary, 5-19
breakpoint operation, 5-34
overview, 1-4
Index-1