tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 96

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
8 TMUX Registers
Table 96. TMUX_RAISINH_CTL, Receive Low-speed Control Parameters (R/W)
96
Address
0x4001C
12:10 TMUX_RTIMP_AISINH[3:1] Receive Path Trace Identifier Mismatch AIS Inhibit
Bit
15
14
13
9
8
7
6
5
TMUX_RPAISLOP_AISINH Receive Path AIS or LOP AIS Inhibit. Control bits,
TMUX_RUNEQP_AISINH Receive Path Unequip AIS Inhibit. Control bit, when
TMUX_RHSSD_AISINH
TMUX_RSDB3_AISINH
TMUX_RPLMP_AISINH
TMUX_RHSSF_AISINH
TMUX_RSFB3_AISINH
TMUX_R_M1_BIT7
(continued)
Name
Receive M1 MSB Mode. Control bit, when set to a logic
1, causes the most significant bit in the M1 byte to be
ignored for line REI accumulation; otherwise, the MSB is
included.
Receive B3 Signal Degrade AIS Inhibit. Control bit,
when set to a logic 1, inhibit the associated alarm from
causing the assertion of the AUTO_AIS output; other-
wise, the associated failure causes assertion of the cor-
responding AUTO_AIS output signal.
Receive B3 Signal Fail AIS Inhibit. Control bit, when
set to a logic 1, inhibit the associated alarm from causing
the assertion of the AUTO_AIS output; otherwise, the
associated failure causes assertion of the corresponding
AUTO_AIS output signal.
Bits. Control bits, when set to a logic 1, inhibit the asso-
ciated alarm from causing the assertion of the
AUTO_AIS output; otherwise, the associated failure
causes assertion of the corresponding AUTO_AIS output
signal.
set to a logic 1, inhibit the associated alarm from causing
the assertion of the AUTO_AIS output; otherwise, the
associated failure causes assertion of the corresponding
AUTO_AIS output signal.
Receive Path Payload Label Mismatch AIS Inhibit.
Control bit, when set to a logic 1, inhibit the associated
alarm from causing the assertion of the AUTO_AIS out-
put; otherwise, the associated failure causes assertion of
the corresponding AUTO_AIS output signal.
Receive High-speed Signal Degrade AIS Inhibit. Con-
trol bits, when set to a logic 1, inhibit the associated
alarm from causing AIS generation; otherwise, the asso-
ciated failure causes AIS generation on all STS-1/AU-3
outputs as well as the assertion of AUTO_AIS outputs.
Receive High-speed Signal Fail AIS Inhibit. Control
bits, when set to a logic 1, inhibit the associated alarm
from causing AIS generation; otherwise, the associated
failure causes AIS generation on all STS-1/AU-3 outputs
as well as the assertion of AUTO_AIS outputs.
when set to a logic 1, inhibit the associated alarm from
causing AIS generation; otherwise, the associated failure
causes AIS generation on all STS-1/AU-3 outputs as well
as the assertion of AUTO_AIS outputs.
Function
Agere Systems Inc.
May 2001
Default
Reset
0
0
0
0
0
0
0
0
0