tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 531

no-image

tmxf28155

Manufacturer Part Number
tmxf28155
Description
Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
Manufacturer
ETC-unknow
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
tmxf281553BAL3C
Manufacturer:
DSP
Quantity:
5
Preliminary Data Sheet
May 2001
21 28-Channel Framer Block Functional Description
The offset is further determined by the use of four bits FRM_THALFOFF, FRM_RHALFOFF, FRM_TQUAROFF,
and FRM_RQUAROFF
FRM_THALFOFF and FRM_RHALFOFF bits will increase the clock edge offset, CEX and CER, by one. When the
CHI clock is twice the data rate (FRM_CMS = 1), setting the FRM_THALFOFF and FRM_RHALFOFF bits will
increase the clock edge offset by two, and setting the FRM_TQUAROFF and FRM_RQUAROFF bits will increase
the clock offset by one.
The byte offsets FRM_TBYOFF[6:0] and FRM_RBYOFF[6:0]
When FRM_CMS = 0, the offset will increment by 16 clock edges; when FRM_CMS = 1, the offset will increment by
32 clock edges.
Figure 73
Figure 73. TCHIDATA and RCHIDATA to CHICK Relationship with FRM_CMS = 0 (CEX = 3 and CER = 4,
Figure 74
Agere Systems Inc.
FRM_CMS = 0, FRM_TFSCKE, FRM_RFSCKE = 0, FRM_TQUAROFF = 0, FRM_RQUAROFF = 0.
FRM_THALFOFF = 1, FRM_TOFF[2:0] = 001, FRM_TBYOFF[6:0] = 0000000.
FRM_RHALFOFF = 0, FRM_ROFF[2:0] = 010, FRM_RBYOFF[6:0] = 0000000.
FRM_CMS = 1, FRM_TFSCKE = 0, FRM_RFSCKE = 0.
FRM_THALFOFF = 1, FRM_TQUAROFF = 1, FRM_TOFF[2:0] = 000, FRM_TBYOFF[6:0] = 0000000.
FRM_RHALFOFF = 1, FRM_RQUAROFF = 0, FRM_ROFF[2:0] = 001, FRM_RBYOFF[6:0] = 0000000.
RCHIDATA
TCHIDATA
TCHICK/
TCHIFS/
RCHICK
RCHIFS
shows an example of the relative timing of CHI 2.048 Mbits/s data with the following parameters:
shows an example of the relative timing of CHI 2.048 Mbits/s data with the following parameters:
Respectively)
(Table
418). When the CHI clock and data rate are the same (FRM_CMS = 0), setting
HIGH IMPEDANCE
1
CHI FRAME SYNC IS SAMPLED ON THE FALLING EDGE
2
CEX = 3
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
CER = 4
(Table
3
BIT 0, TS 0
BIT 0, TS 0
418) increment the offset one byte at a time.
4
(continued)
5
TMXF28155/51 Super Mapper
BIT 1, TS 0
BIT 1, TS 0
6
7
8
BIT 2, TS 0
BIT 2, TS 0
5-8983(F)
531

Related parts for tmxf28155