tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 145

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

Preliminary Data Sheet
May 2001
9 SPE Mapper Registers
Table 155. SPE_TRDIREI_CTL, Transmit Path RDI and REI Control Register (R/W)
Table 156. SPE_TERRINS_CTL, Transmit Error Insertion Control (R/W)
Table 157. SPE_TOHINS1—SPE_TOHINS4, Transmit OH Insert Value (R/W)
Agere Systems Inc.
Address
0x3001E
Address
Address
0x3001F
0x30020
0x30021
0x30022
0x30023
15:3
15:8
15:8
15:8
15:8
Bit
Bit
Bit
7:0
7:0
7:0
7:0
2
1
0
2
1
0
SPE_TC2DINS[7:0] Transmit C2 Byte Value. This value is inserted into the
SPE_TG1DINS[7:0] Transmit G1 Byte Value. This value is inserted into the
SPE_TN1DINS[7:0] Transmit N1 Byte Value. This value is inserted into the
SPE_TH4DINS[7:0] Transmit H4 Byte Value. This value is inserted into the
SPE_TF3DINS[7:0] Transmit F3 Byte Value. This value is inserted into the
SPE_TF2DINS[7:0] Transmit F2 Byte Value. This value is inserted into the
SPE_TK3DINS[7:0] Transmit K3 Byte Value. This value is inserted into the
SPE_TREIERRINS Transmit G1 Error Insert. When 1, an error will be inserted
SPE_TPAIS_PRDIINH
SPE_TB3ERRINS
SPE_BERR_INS
SPE_TPRDI_MODE
SPE_TREIP_INH
Name
Name
Name
—
—
(continued)
Reserved.
Bit Error Insert Control Bit. When 1, bit errors will be
inserted on selected signals (whose error insert bits are set)
each time a pulse occurs on the BER_INS line.
Transmit B3 Error Insertion. When 1, the B3 output will be
inverted.
continuously into the outgoing G1[7:4] bits, until reset to 0.
transmit F3 byte.
transmit F2 byte.
transmit C2 byte.
transmit K3 byte.
transmit G1 byte.
transmit N1 byte.
Reserved.
transmit H4 byte.
Transmit Path AIS RDI Inhibit. Control bit, when 1, the
path AIS failure will not contribute to the automatic inser-
tion of RDI-P; otherwise, the associated alarm contrib-
utes to the generation of RDI-P.
Transmit PRDI Mode. When 1, 3-bit enhanced ERDI
mode is supported; when 0, the 1-bit RDI mode is
supported.
Transmit REI-P Inhibit. When 1, inhibits automatic inser-
tion of REI-P.
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
Function
Function
Function
TMXF28155/51 Super Mapper
Default
Default
Default
Reset
0x000
Reset
Reset
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0
0
0
0
0
0
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