tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 80

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
8 TMUX Registers
Table 82. TMUX_RHS_DLT, Delta/Event (COR/COW) (continued)
80
Address
0x40006
Bit
7
6
5
4
3
2
1
0
TMUX_RHSILOCD Receive High-speed Loss of Input Clock Delta. This
TMUX_RHSOOFD Receive High-speed Out of Frame Delta. This delta bit
TMUX_RF1MOND Receive F1 Monitor Delta. This delta bit indicates a
TMUX_RHSLOSD Receive High-speed Loss of Signal Delta. This delta
TMUX_RHSLOFD Receive High-speed Loss of Frame Delta. This delta
TMUX_RHSSDD
TMUX_RHSSFD
TMUX_RTIMSD
Name
(continued)
change in state of TMUX_RF1MON0[7:0] and
TMUX_RF1MON1[7:0]
new value is detected in the incoming F1 byte for
TMUX_CNTDF1[3:0]
current value is stored in TMUX_RF1MON0[7:0] and the
previous value is stored in TMUX_RF1MON0[7:0]. The
mask bit is TMUX_RF1MONM
Receive Section Trace Identifier Mismatch Delta. This
delta bit indicates a change in state in the received 16-
byte J0 sequence of bytes if the J0 mode is programmed
to receive a 16-byte sequence. The mask bit is
TMUX_RTIMSM
Receive High-speed Signal Fail BER Algorithm Delta.
This delta bit indicates a change of state for the signal fail
BER algorithm state bit TMUX_RHSSF
mask bit for this delta bit is TMUX_RHSSFM
Receive High-speed Signal Degrade BER Algorithm
Delta. This delta bit indicates a change of state for the
signal degrade BER algorithm state bit TMUX_RHSSD
(Table
bit indicates a change in state of either TMUX_RHSLOS
(Table
TMUX_RHSLOSEXTI is an external input from a device
pin. TMUX_RHSLOS is an internally generated state bit
based on monitoring for a consecutive 0/1s pattern in the
data input. The mask bit is TMUX_RHSLOSM
bit indicates a change in state of TMUX_RHSLOF
(Table
indicates a change in state of TMUX_RHSOOF
(Table
delta bit indicates a change in state of the
TMUX_RHSILOC
TMUX_RHSILOCM
91). The mask bit is TMUX_RHSSDM
91) or TMUX_RHSLOSEXTI
91). The mask bit is TMUX_RHSLOFM
91). The mask bit is TMUX_RHSOOFM
(Table
(Table
(Table
(Table
(Table
Function
86).
91) state bit. The mask bit is
86).
98) continuous frames. The
101) when a consistent
(Table
(Table
86).
(Table
91).
(Table
(Table
(Table
(Table
(Table
91). The
86).
86).
86).
86).
86).
Agere Systems Inc.
Reset Default
May 2001
0
0
0
0
0
0
0
0