tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 553

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

Preliminary Data Sheet
TMXF28155/51 Super Mapper
May 2001
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
22 Cross Connect (XC) Block Functional Description
(continued)
22.6.3 VT Mapper DS1/E1 Interface
The user configures the VT mapper DS1/E1 connections from the crosspoint by loading the appropriate
SOURCE_IDs into the VT mapper crosspoint configuration registers.
The user may connect any valid DS1 or E1 signal bundle from the M13 MUX, framer, external I/O, TPG, or DJA
blocks to any VT mapper input. Each of the 28 possible DS1 or 21 possible E1 inputs may be assigned a XC1
source ID for the corresponding XC_VDATA[1—28][7:0]
(Table
454) byte in the XC_VT_SRC[1—14] configuration
registers. The user must ensure the consistency of the designation of DS1(J1) vs. E1 channels and block interface
parameters.
The cross connect block automatically supports independent signal paths for remote alarm indication (RAI), alarm
indicator signal (AIS), frame sync (byte synchronous mode only), and signaling (out of band signaling) on channels
between the VT mapper and the framer.
22.6.4 Digital Jitter Attenuator (DJA) Interface
The DJA block consists of up to 28 DS1 jitter attenuator channels or up to 21 E1 jitter attenuation channels. The
DS1 or E1 channels are cross connected from the VT mapper, M13 MUX, framer, external I/O interface, or test
interface and the DJA outputs are returned to the crosspoint switch for cross connect to the destination. Test sig-
nals from the TPG will not require jitter attenuation, although this capability exits. The crosspoint cannot chain jitter
attenuators together serially (that is, DJA to DJA paths are not supported).
The user configures the DJA DS1(E1) outputs from the crosspoint by loading the appropriate SOURCE_IDs into
the DJA crosspoint configuration registers.
The user may connect any valid DS1 or E1 signal bundle from the external I/O pin, M13, VT mapper, framer, or
TPG blocks to any DJA input. Each of the 28 possible DS1 (J1) or 21 possible E1 inputs may be assigned a XC1
source ID for the corresponding XC_JDATA[1—28][7:0]
(Table
455) byte in the XC_DJA_SRC[1—14] configuration
registers. The user must ensure the consistency of the designation of DS1(J1) vs. E1 channels.
The cross connect is provided with DS1 and E1 reference clocks from the DJA block. These 1X clocks are derived
from external AIS clock inputs, and are made available to the test-pattern generator block for use as the test-
pattern source clocks. The DJA block is responsible for the correct assignment of reference clocks to jitter attenua-
tion channels.
When a channel from the VT mapper is cross connected to a DJA channel, the bundled signals include receive
pointer adjustment information. For all other sources, the pointer adjustment signal is not required and is disabled.
Framer Interface
The framer block can pass through a total bandwidth of one DS3. This may be formed from 28 DS1s or 21 E1s or
any mix where a group of four adjacent DS1 channels may be substituted by three E1s. The DS1 or E1 channels
can be cross connected to the M13 MUX, VT mapper, external I/O interface, or test interface. The framer block pro-
vides extensive per link loopback capability based on DS1/E1 standards.
As previously stated, special channels for AIS, RAI, frame sync, and signaling are enabled when the framer is
cross connected to the VT mapper.
The framer presents six interfaces to the cross connect as shown in
Figure 82 on page546
. Although somewhat
flexible, most applications will cross connect the framer interfaces
FRM_TP_T (XC1—source ID = 010) and FRM_RP_R (XC1—destination = XC_RP_RDATA[1—28][7:0]
(Table
452)) to the M13 MUX or VT mapper. If desired, the digital jitter attenuators may be inserted in this connec-
tion.
Agere Systems Inc.
553