tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 554

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
22 Cross Connect (XC) Block Functional Description
An example of an exception to this rule is the framer only application where the Super Mapper is used as a block of
28 framers with a CHI system interface. The 28 framers would interface line interface units with FRM_TP_T and
FRM_RP_R and the system with FRM_TS and FRM_RS entirely through the multifunction system interface device
pins.
Either end of the framer block may be configured to interface to line interface units as shown in
page
FRM_RP_T and FRM_TP_R framer block interfaces the LIUs in a transport application. If a dual-rail or bipolar LIU
interface is desired, the sync line is used as the negative-rail data.
The user configures the framer block connectivity by simply loading the appropriate source IDs into the
XC_TP_RDATA[1—28][7:0]
of the framer crosspoint configuration registers: XC_FTP_SRC[1—28][7:0], XC_FRP_SRC[1—28][7:0], and
XC_FRS_SRC[1—28][7:0], respectively.
22.6.5 Framer System Interface
The framer system interface FRM_TS/FRM_RS consists of bundles of data, clock, and/or sync/miscellany, that
may only be connected to the device external I/O pins. The system interface operates as the parallel system bus
(PSB), concentration highway (CHI), or network serial multiplexed interface (NSMI). Note that not all pins are used
in these configurations. The user should exercise caution in mixing the usage of the external pins between system
interface TS/RS usage and any other use.
Two register bits, XC_SI_CHI and XC_SYNC_FOR_DATA
XC_CHI_MODE[1—7][1:0]
554
554. In a framer only application, the FRM_TP_T and FRM_RP_R framer block interfaces with the LIUs. The
LINERXSYNC
EXTERNAL I/O
LINETXSYNC
LINERXDATA
LINETXDATA
LINERXCLK
LINETXCLK
XC_PDATA[1—29][7:0]
XC_SYNC[1—29][7:0]
(Table
(Table
3x29
3x29
Figure 85. Framer Line Interface Cross Connect
450) are used to assist with the configuration of the system interface.
456), XC_RP_RDATA[1—28][7:0], and XC_RS_D[1—28][7:0]
XC1
XC
(Table
449), and a group of seven 2-bit parameters
XC_TP_RDATA[1—28][7:0]
XC_RP_RDATA[1—28][7:0]
(continued)
3x28
3x28
3x28
3x28
XC_TP_RDATA
XC_TP_RCLK
XC_TP_RFS
XC_RP_RDATA
XC_RP_RCLK
XC_RP_RFS
FRM_TP_TDATA
FRM_TP_TCLK
FRM_TP_TFS
FRM_RP_TDATA
FRM_RP_TCLK
FRM_RP_TFS
FRM_RP_R
FRM_TP_R
FRM_TP_T
FRM_RP_T
Figure 85 on
Agere Systems Inc.
FRM
(Table
May 2001
457) bytes
5-9184(F)r.1